mtd: spi-nor: sfdp: parse xSPI Profile 1.0 table
authorPratyush Yadav <p.yadav@ti.com>
Mon, 5 Oct 2020 15:31:28 +0000 (21:01 +0530)
committerVignesh Raghavendra <vigneshr@ti.com>
Mon, 9 Nov 2020 06:26:16 +0000 (11:56 +0530)
commitfb27f198971a68fec59d5493b68e35e916fce62c
tree21e4ca1bf4746603b30d2bdfbb7435db61365ef2
parent0e1b2fc4e5f681ba716f5a50da710251c717413d
mtd: spi-nor: sfdp: parse xSPI Profile 1.0 table

This table is indication that the flash is xSPI compliant and hence
supports octal DTR mode. Extract information like the fast read opcode,
dummy cycles, the number of dummy cycles needed for a Read Status
Register command, and the number of address bytes needed for a Read
Status Register command.

We don't know what speed the controller is running at. Find the fast
read dummy cycles for the fastest frequency the flash can run at to be
sure we are never short of dummy cycles. If nothing is available,
default to 20. Flashes that use a different value should update it in
their fixup hooks.

Since we want to set read settings, expose spi_nor_set_read_settings()
in core.h.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20201005153138.6437-6-p.yadav@ti.com
drivers/mtd/spi-nor/core.c
drivers/mtd/spi-nor/core.h
drivers/mtd/spi-nor/sfdp.c