target/riscv: Allow debugger to access user timer and counter CSRs
authorBin Meng <bmeng@tinylab.org>
Tue, 28 Feb 2023 13:45:30 +0000 (21:45 +0800)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 2 Mar 2023 00:40:21 +0000 (16:40 -0800)
commitfb517fdb150b71d6fad8e2332c9aace82143e45f
tree637c87d7b3b6d9e2d54bcf769f3ad74246a17eb1
parent7eac8f4191561492fa9fa1e12c80fe27d9842fc6
target/riscv: Allow debugger to access user timer and counter CSRs

At present user timer and counter CSRs are not reported in the
CSR XML hence gdb cannot access them.

Fix it by adding a debugger check in their predicate() routine.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Message-ID: <20230228104035.1879882-14-bmeng@tinylab.org>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
target/riscv/csr.c