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pinctrl: renesas: r8a779h0: Add SCIF_CLK pins, groups, functions
authorCong Dang <cong.dang.xn@renesas.com>
Fri, 26 Jan 2024 10:44:05 +0000 (11:44 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 20 Feb 2024 10:43:48 +0000 (11:43 +0100)
commitfbaff0364a42e3160c0fbc56087c4348434066d1
tree25155b975fc954ae85b1c451e037e25723ce0645tree | snapshot
parentbc56b11cd734a7c640a6e434cb40cd0c52da9376commit | diff
pinctrl: renesas: r8a779h0: Add SCIF_CLK pins, groups, functions

Add pins, groups and functions for the baud rate generation clock pins
(SCIF_CLK) on the Renesas R-Car V4M (R8A779H0) SoC.

Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/ee056d78d3a339bdbcca2cc5281f1fe01bbc3953.1706264667.git.geert+renesas@glider.be
drivers/pinctrl/renesas/pfc-r8a779h0.c diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git