riscv: dts: renesas: rzfive-smarc-som: Drop deleting interrupt properties from ETH0...
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Wed, 3 Apr 2024 20:35:03 +0000 (21:35 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 22 Apr 2024 07:45:19 +0000 (09:45 +0200)
commitfc5d2b222ab18612bc7bdfef7f672afd2cd7275b
tree2845605356c9634cfbdaa640223607d136f81354
parent1731ab2f8b62f0be2073de581ffef6db1196ad4f
riscv: dts: renesas: rzfive-smarc-som: Drop deleting interrupt properties from ETH0/1 nodes

Now that we have enabled IRQC support for RZ/Five SoC switch to interrupt
mode for ethernet0/1 PHYs instead of polling mode.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240403203503.634465-6-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi