drm/i915/dp: Register definition for DP compliance register
authorAnimesh Manna <animesh.manna@intel.com>
Tue, 24 Mar 2020 05:11:11 +0000 (10:41 +0530)
committerMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Wed, 8 Apr 2020 12:41:03 +0000 (14:41 +0200)
commitfce214aea8e061ba99aee9c85c3df437c2e72364
tree1673ec8a3198f17e68c8bd719758a11a556008e8
parent75947e39f3d94fb7884a70cd07dd9bdcb1a0f973
drm/i915/dp: Register definition for DP compliance register

DP_COMP_CTL and DP_COMP_PAT register used to program DP
compliance pattern.

v1: Initial patch.
v2: used pipe instead of port in macro definition. [Manasi]
v3: used trans_offset for offset calculation. [Manasi]
v4: Used MMIO_PIPE for evenly spaced register offset instead
MMIO_PIPE2. [Ville]

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200324051111.29398-1-animesh.manna@intel.com
drivers/gpu/drm/i915/i915_reg.h