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ASoC: cs42l42: Set correct SRC MCLK
authorRichard Fitzgerald <rf@opensource.cirrus.com>
Fri, 15 Oct 2021 13:36:16 +0000 (14:36 +0100)
committerMark Brown <broonie@kernel.org>
Fri, 15 Oct 2021 15:14:20 +0000 (16:14 +0100)
commitfdbd256175a1e11c1ba827112d56b9a3952e1219
tree356e66d37442d1a91e56a798f8646df28da768d4tree | snapshot
parent4ae1d8f911d6fc20baefd5eb061bf6964fa22a32commit | diff
ASoC: cs42l42: Set correct SRC MCLK

According to the datasheet the SRC MCLK must be as near as possible to
(125 * sample rate). This means it should be ~6MHz for rates up to 48k
and ~12MHz for rates above that. As per datasheet table 4-21.

Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Link: https://lore.kernel.org/r/20211015133619.4698-14-rf@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/codecs/cs42l42.c diff | blob | history
sound/soc/codecs/cs42l42.h diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git