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ACPICA: SRAT: Add RISC-V RINTC affinity structure
authorHaibo Xu <haibo1.xu@intel.com>
Wed, 17 Jan 2024 13:06:43 +0000 (21:06 +0800)
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>
Fri, 12 Apr 2024 13:40:16 +0000 (15:40 +0200)
commitfe1c408d50604f6013ca273d14b0ffeb845f23b1
treebdbdeee9f6c1065dcf619bd60d7253c11b69933ctree | snapshot
parent66536b86c57365840cd468d9c608b7833a7a0890commit | diff
ACPICA: SRAT: Add RISC-V RINTC affinity structure

ACPICA commit 93caddbf2f620769052c59ec471f018281dc3a24

Add definition of RISC-V Interrupt Controller(RINTC)
affinity structure which was approved by UEFI forum
and will be part of next ACPI spec version(6.6).

Link: https://github.com/acpica/acpica/commit/93caddbf
Signed-off-by: Haibo Xu <haibo1.xu@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
include/acpi/actbl3.h diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git