arm64: tegra: Add memory controller channels

From tegra186 onwards, memory controller support multiple channels.
During the error interrupts from memory controller, corresponding
channels need to be accessed for logging error info and clearing the
interrupt.
So add address and size of these channels in device tree node of
tegra186, tegra194 and tegra234 memory controller. Also add reg-names
for each of these reg items which are used by driver for mapping.

Signed-off-by: Ashish Mhetre <amhetre@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index 2e7faa1e0b9cf67fcd324a48797ee5ff53fe3bc3..0e9afc3e2f2689d7f47e8b8d6ebce23b7b01045e 100644 (file)
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -528,7 +528,13 @@
 
        mc: memory-controller@2c00000 {
                compatible = "nvidia,tegra186-mc";
-               reg = <0x0 0x02c00000 0x0 0xb0000>;
+               reg = <0x0 0x02c00000 0x0 0x10000>,    /* MC-SID */
+                     <0x0 0x02c10000 0x0 0x10000>,    /* Broadcast channel */
+                     <0x0 0x02c20000 0x0 0x10000>,    /* MC0 */
+                     <0x0 0x02c30000 0x0 0x10000>,    /* MC1 */
+                     <0x0 0x02c40000 0x0 0x10000>,    /* MC2 */
+                     <0x0 0x02c50000 0x0 0x10000>;    /* MC3 */
+               reg-names = "sid", "broadcast", "ch0", "ch1", "ch2", "ch3";
                interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
 

diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index f9d343b2459730505047cb481c655a3ff8de45fa..d1f8248c00f41bfc6b373d9fdc0b6092bb5e8172 100644 (file)
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -612,9 +612,27 @@
 
                mc: memory-controller@2c00000 {
                        compatible = "nvidia,tegra194-mc";
-                       reg = <0x02c00000 0x100000>,
-                             <0x02b80000 0x040000>,
-                             <0x01700000 0x100000>;
+                       reg = <0x02c00000 0x10000>,   /* MC-SID */
+                             <0x02c10000 0x10000>,   /* MC Broadcast*/
+                             <0x02c20000 0x10000>,   /* MC0 */
+                             <0x02c30000 0x10000>,   /* MC1 */
+                             <0x02c40000 0x10000>,   /* MC2 */
+                             <0x02c50000 0x10000>,   /* MC3 */
+                             <0x02b80000 0x10000>,   /* MC4 */
+                             <0x02b90000 0x10000>,   /* MC5 */
+                             <0x02ba0000 0x10000>,   /* MC6 */
+                             <0x02bb0000 0x10000>,   /* MC7 */
+                             <0x01700000 0x10000>,   /* MC8 */
+                             <0x01710000 0x10000>,   /* MC9 */
+                             <0x01720000 0x10000>,   /* MC10 */
+                             <0x01730000 0x10000>,   /* MC11 */
+                             <0x01740000 0x10000>,   /* MC12 */
+                             <0x01750000 0x10000>,   /* MC13 */
+                             <0x01760000 0x10000>,   /* MC14 */
+                             <0x01770000 0x10000>;   /* MC15 */
+                       reg-names = "sid", "broadcast", "ch0", "ch1", "ch2", "ch3",
+                                   "ch4", "ch5", "ch6", "ch7", "ch8", "ch9", "ch10",
+                                   "ch11", "ch12", "ch13", "ch14", "ch15";
                        interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
                        #interconnect-cells = <1>;
                        status = "disabled";

diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
index 71c21d7d0551ebc838fa139e975edab11850fb6a..cb3af539e4770249883553d8815b3b59169a8746 100644 (file)
--- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -515,9 +515,27 @@
 
                mc: memory-controller@2c00000 {
                        compatible = "nvidia,tegra234-mc";
-                       reg = <0x02c00000 0x100000>,
-                             <0x02b80000 0x040000>,
-                             <0x01700000 0x100000>;
+                       reg = <0x02c00000 0x10000>,   /* MC-SID */
+                             <0x02c10000 0x10000>,   /* MC Broadcast*/
+                             <0x02c20000 0x10000>,   /* MC0 */
+                             <0x02c30000 0x10000>,   /* MC1 */
+                             <0x02c40000 0x10000>,   /* MC2 */
+                             <0x02c50000 0x10000>,   /* MC3 */
+                             <0x02b80000 0x10000>,   /* MC4 */
+                             <0x02b90000 0x10000>,   /* MC5 */
+                             <0x02ba0000 0x10000>,   /* MC6 */
+                             <0x02bb0000 0x10000>,   /* MC7 */
+                             <0x01700000 0x10000>,   /* MC8 */
+                             <0x01710000 0x10000>,   /* MC9 */
+                             <0x01720000 0x10000>,   /* MC10 */
+                             <0x01730000 0x10000>,   /* MC11 */
+                             <0x01740000 0x10000>,   /* MC12 */
+                             <0x01750000 0x10000>,   /* MC13 */
+                             <0x01760000 0x10000>,   /* MC14 */
+                             <0x01770000 0x10000>;   /* MC15 */
+                       reg-names = "sid", "broadcast", "ch0", "ch1", "ch2", "ch3",
+                                   "ch4", "ch5", "ch6", "ch7", "ch8", "ch9", "ch10",
+                                   "ch11", "ch12", "ch13", "ch14", "ch15";
                        interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
                        #interconnect-cells = <1>;
                        status = "okay";