{ STB0899_RCOMPC                , 0xc9 },
        { STB0899_AGC1CN                , 0x01 },
        { STB0899_AGC1REF               , 0x10 },
-       { STB0899_RTC                   , 0x23 },
+       { STB0899_RTC                   , 0x23 },
        { STB0899_TMGCFG                , 0x4e },
        { STB0899_AGC2REF               , 0x34 },
        { STB0899_TLSR                  , 0x84 },
        { STB0899_CFD                   , 0xf7 },
-       { STB0899_ACLC                  , 0x87 },
+       { STB0899_ACLC                  , 0x87 },
        { STB0899_BCLC                  , 0x94 },
        { STB0899_EQON                  , 0x41 },
        { STB0899_LDT                   , 0xf1 },
        { STB0899_ECNT3M                , 0x0a },
        { STB0899_ECNT3L                , 0xad },
        { STB0899_FECAUTO1              , 0x06 },
-       { STB0899_FECM                  , 0x01 },
+       { STB0899_FECM                  , 0x01 },
        { STB0899_VTH12                 , 0xb0 },
        { STB0899_VTH23                 , 0x7a },
-       { STB0899_VTH34                 , 0x58 },
+       { STB0899_VTH34                 , 0x58 },
        { STB0899_VTH56                 , 0x38 },
        { STB0899_VTH67                 , 0x34 },
        { STB0899_VTH78                 , 0x24 },
        { STB0899_RSULC                 , 0xb1 }, /* DVB = 0xb1, DSS = 0xa1 */
        { STB0899_TSULC                 , 0x42 },
        { STB0899_RSLLC                 , 0x41 },
-       { STB0899_TSLPL                 , 0x12 },
+       { STB0899_TSLPL                 , 0x12 },
        { STB0899_TSCFGH                , 0x0c },
        { STB0899_TSCFGM                , 0x00 },
        { STB0899_TSCFGL                , 0x00 },
 
  *    along with this program; if not, write to the Free Software
  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
- 
+
 #ifndef __ATBM8830_PRIV_H
 #define __ATBM8830_PRIV_H
 
 
        { STB0899_RCOMPC                , 0xc9 },
        { STB0899_AGC1CN                , 0x01 },
        { STB0899_AGC1REF               , 0x10 },
-       { STB0899_RTC                   , 0x23 },
+       { STB0899_RTC                   , 0x23 },
        { STB0899_TMGCFG                , 0x4e },
        { STB0899_AGC2REF               , 0x34 },
        { STB0899_TLSR                  , 0x84 },
        { STB0899_CFD                   , 0xf7 },
-       { STB0899_ACLC                  , 0x87 },
+       { STB0899_ACLC                  , 0x87 },
        { STB0899_BCLC                  , 0x94 },
        { STB0899_EQON                  , 0x41 },
        { STB0899_LDT                   , 0xf1 },
        { STB0899_ECNT3M                , 0x0a },
        { STB0899_ECNT3L                , 0xad },
        { STB0899_FECAUTO1              , 0x06 },
-       { STB0899_FECM                  , 0x01 },
+       { STB0899_FECM                  , 0x01 },
        { STB0899_VTH12                 , 0xb0 },
        { STB0899_VTH23                 , 0x7a },
-       { STB0899_VTH34                 , 0x58 },
+       { STB0899_VTH34                 , 0x58 },
        { STB0899_VTH56                 , 0x38 },
        { STB0899_VTH67                 , 0x34 },
        { STB0899_VTH78                 , 0x24 },
        { STB0899_RSULC                 , 0xb1 }, /* DVB = 0xb1, DSS = 0xa1 */
        { STB0899_TSULC                 , 0x42 },
        { STB0899_RSLLC                 , 0x41 },
-       { STB0899_TSLPL                 , 0x12 },
+       { STB0899_TSLPL                 , 0x12 },
        { STB0899_TSCFGH                , 0x0c },
        { STB0899_TSCFGM                , 0x00 },
        { STB0899_TSCFGL                , 0x00 },
 
 
 /* gain - offset masks */
 #define GAIN_INTEGER_SHIFT                     9
-#define OFFSET_MASK                            0xFFF
+#define OFFSET_MASK                            0xFFF
 #define GAIN_SDRAM_EN_SHIFT                    12
 #define GAIN_IPIPE_EN_SHIFT                    13
 #define GAIN_H3A_EN_SHIFT                      14
 
 
        /* 'val' is one byte and represents half of the exposure value we are
         * going to set into registers, a two bytes value:
-        * 
+        *
         *    MSB: ((u16) val << 1) >> 8   == val >> 7
         *    LSB: ((u16) val << 1) & 0xff == val << 1
         */
 
  *             COM12 |= OV9640_COM12_YUV_AVG
  *
  *      for RGB, alter the following registers:
- *             COM7  |= OV9640_COM7_RGB
- *             COM13 |= OV9640_COM13_RGB_AVG
- *             COM15 |= proper RGB color encoding mode
+ *             COM7  |= OV9640_COM7_RGB
+ *             COM13 |= OV9640_COM13_RGB_AVG
+ *             COM15 |= proper RGB color encoding mode
  */
 static const struct ov9640_reg ov9640_regs_qqcif[] = {
        { OV9640_CLKRC, OV9640_CLKRC_DPLL_EN | OV9640_CLKRC_DIV(0x0f) },