usb: dwc3: Issue core soft reset before enabling run/stop
authorWesley Cheng <quic_wcheng@quicinc.com>
Wed, 16 Mar 2022 01:13:58 +0000 (18:13 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 18 Mar 2022 11:58:46 +0000 (12:58 +0100)
It is recommended by the Synopsis databook to issue a DCTL.CSftReset
when reconnecting from a device-initiated disconnect routine.  This
resolves issues with enumeration during fast composition switching
cases, which result in an unknown device on the host.

Reviewed-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
Signed-off-by: Wesley Cheng <quic_wcheng@quicinc.com>
Link: https://lore.kernel.org/r/20220316011358.3057-1-quic_wcheng@quicinc.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/usb/dwc3/core.c
drivers/usb/dwc3/core.h
drivers/usb/dwc3/gadget.c

index 416d83a055fe9e277e418b238045f552c4b3a7da..1170b800acdceb342f84c7a1743c61ca5969af55 100644 (file)
@@ -115,8 +115,6 @@ void dwc3_set_prtcap(struct dwc3 *dwc, u32 mode)
        dwc->current_dr_role = mode;
 }
 
-static int dwc3_core_soft_reset(struct dwc3 *dwc);
-
 static void __dwc3_set_mode(struct work_struct *work)
 {
        struct dwc3 *dwc = work_to_dwc(work);
@@ -261,7 +259,7 @@ u32 dwc3_core_fifo_space(struct dwc3_ep *dep, u8 type)
  * dwc3_core_soft_reset - Issues core soft reset and PHY reset
  * @dwc: pointer to our context structure
  */
-static int dwc3_core_soft_reset(struct dwc3 *dwc)
+int dwc3_core_soft_reset(struct dwc3 *dwc)
 {
        u32             reg;
        int             retries = 1000;
index e9b1e9b8f1f32d14a575ef97244650f15c34a6f3..5c9d467195a628d39a6991da55c9bf47412946d6 100644 (file)
@@ -1532,6 +1532,8 @@ bool dwc3_has_imod(struct dwc3 *dwc);
 int dwc3_event_buffers_setup(struct dwc3 *dwc);
 void dwc3_event_buffers_cleanup(struct dwc3 *dwc);
 
+int dwc3_core_soft_reset(struct dwc3 *dwc);
+
 #if IS_ENABLED(CONFIG_USB_DWC3_HOST) || IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE)
 int dwc3_host_init(struct dwc3 *dwc);
 void dwc3_host_exit(struct dwc3 *dwc);
index 2a96826b7efd2987bbbe7db2279d5df233469a66..ab725d2262d65e067f14ad6d6410942b4870b79c 100644 (file)
@@ -2578,6 +2578,17 @@ static int dwc3_gadget_pullup(struct usb_gadget *g, int is_on)
                                                dwc->ev_buf->length;
                }
        } else {
+               /*
+                * In the Synopsys DWC_usb31 1.90a programming guide section
+                * 4.1.9, it specifies that for a reconnect after a
+                * device-initiated disconnect requires a core soft reset
+                * (DCTL.CSftRst) before enabling the run/stop bit.
+                */
+               spin_unlock_irqrestore(&dwc->lock, flags);
+               dwc3_core_soft_reset(dwc);
+               spin_lock_irqsave(&dwc->lock, flags);
+
+               dwc3_event_buffers_setup(dwc);
                __dwc3_gadget_start(dwc);
        }