arm64: dts: qcom: sm8250: Add support for LLCC block
authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Mon, 30 Nov 2020 09:39:22 +0000 (15:09 +0530)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Mon, 28 Dec 2020 18:14:19 +0000 (12:14 -0600)
Add support for Last Level Cache Controller (LLCC) in SM8250 SoC.
This LLCC is used to provide common cache memory pool for the cores in
the SM8250 SoC thereby minimizing the percore caches.

Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20201130093924.45057-3-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
arch/arm64/boot/dts/qcom/sm8250.dtsi

index 65acd1f381eba849bf612e42f1689c10caa088e7..118b6bb29ebc99094f6648f34de8b4c6c8dd1589 100644 (file)
                        };
                };
 
+               system-cache-controller@9200000 {
+                       compatible = "qcom,sm8250-llcc";
+                       reg = <0 0x09200000 0 0x1d0000>, <0 0x09600000 0 0x50000>;
+                       reg-names = "llcc_base", "llcc_broadcast_base";
+               };
+
                usb_2: usb@a8f8800 {
                        compatible = "qcom,sm8250-dwc3", "qcom,dwc3";
                        reg = <0 0x0a8f8800 0 0x400>;