}
/* DAI clock master masks */
- switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
- case SND_SOC_DAIFMT_CBM_CFM:
+ switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
+ case SND_SOC_DAIFMT_BC_FC:
i2s->ms_flg = I2S_MS_SLAVE;
break;
- case SND_SOC_DAIFMT_CBS_CFS:
+ case SND_SOC_DAIFMT_BP_FP:
i2s->ms_flg = I2S_MS_MASTER;
break;
default:
dev_err(cpu_dai->dev, "Unsupported mode %#x\n",
- fmt & SND_SOC_DAIFMT_MASTER_MASK);
+ fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK);
return -EINVAL;
}
static const struct snd_soc_dai_ops stm32_i2s_pcm_dai_ops = {
.set_sysclk = stm32_i2s_set_sysclk,
- .set_fmt = stm32_i2s_set_dai_fmt,
+ .set_fmt_new = stm32_i2s_set_dai_fmt,
.startup = stm32_i2s_startup,
.hw_params = stm32_i2s_hw_params,
.trigger = stm32_i2s_trigger,
stm32_sai_sub_reg_up(sai, STM_SAI_FRCR_REGX, frcr_mask, frcr);
/* DAI clock master masks */
- switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
- case SND_SOC_DAIFMT_CBM_CFM:
+ switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
+ case SND_SOC_DAIFMT_BC_FC:
/* codec is master */
cr1 |= SAI_XCR1_SLAVE;
sai->master = false;
break;
- case SND_SOC_DAIFMT_CBS_CFS:
+ case SND_SOC_DAIFMT_BP_FP:
sai->master = true;
break;
default:
dev_err(cpu_dai->dev, "Unsupported mode %#x\n",
- fmt & SND_SOC_DAIFMT_MASTER_MASK);
+ fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK);
return -EINVAL;
}
static const struct snd_soc_dai_ops stm32_sai_pcm_dai_ops = {
.set_sysclk = stm32_sai_set_sysclk,
- .set_fmt = stm32_sai_set_dai_fmt,
+ .set_fmt_new = stm32_sai_set_dai_fmt,
.set_tdm_slot = stm32_sai_set_dai_tdm_slot,
.startup = stm32_sai_startup,
.hw_params = stm32_sai_hw_params,