media: adv7511: fix incorrect clear of CEC receive interrupt

If a CEC message was received and the RX interrupt was set, but
not yet processed, and a new transmit was issues, then the
transmit code would inadvertently clear the RX interrupt and
after that no new messages would ever be received.

Instead it should only clear TX interrupts since register 0x97
is a clear-on-write register.

Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>

diff --git a/drivers/media/i2c/adv7511.c b/drivers/media/i2c/adv7511.c
index d4b191c5ac4792af2215038a4c30e3f8bd99c11a..5731751d3f2a427f5e3666b68a5e1acfcc08e33f 100644 (file)
--- a/drivers/media/i2c/adv7511.c
+++ b/drivers/media/i2c/adv7511.c
@@ -831,8 +831,8 @@ static int adv7511_cec_adap_transmit(struct cec_adapter *adap, u8 attempts,
         */
        adv7511_cec_write_and_or(sd, 0x12, ~0x70, max(1, attempts - 1) << 4);
 
-       /* blocking, clear cec tx irq status */
-       adv7511_wr_and_or(sd, 0x97, 0xc7, 0x38);
+       /* clear cec tx irq status */
+       adv7511_wr(sd, 0x97, 0x38);
 
        /* write data */
        for (i = 0; i < len; i++)