drm/amdkfd: Check PCIe atomics support on GFX11 to set CP_HQD_HQ_STATUS0[29]

CP_HQD_HQ_STATUS0[29] bit will be used by CPFW to acknowledge whether
PCIe atomics are supported. The default value of this bit is set
to 0. Driver will check whether PCIe atomics are supported and set the
bit to 1 if supported. This will force CPFW to use real atomic ops.
If the bit is not set, CPFW will default to read/modify/write using the
firmware itself.

This is applicable only to GFX11 RS64 CP with MEC FW >= 509. If MEC
FW < 509 and for all GFX11 F32 CP, PCIe atomics needs to be supported
else it will skip the device.

This commit also involves moving amdgpu_amdkfd_device_probe() function
call after per-IP early_init loop in amdgpu_device_ip_early_init()
function so as to check for RS64 enabled device.

Signed-off-by: Sreekant Somasekharan <sreekant.somasekharan@amd.com>
Reviewed-by: Graham Sider <Graham.Sider@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 4819b3f86750273932c18ab5ebe2bd37297efc2a..efdc6b73a55c39264ed475dcff77b35e0e023010 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2184,7 +2184,6 @@ static int amdgpu_device_ip_early_init(struct amdgpu_device *adev)
                adev->has_pr3 = parent ? pci_pr3_present(parent) : false;
        }
 
-       amdgpu_amdkfd_device_probe(adev);
 
        adev->pm.pp_feature = amdgpu_pp_feature_mask;
        if (amdgpu_sriov_vf(adev) || sched_policy == KFD_SCHED_POLICY_NO_HWS)
@@ -2240,6 +2239,7 @@ static int amdgpu_device_ip_early_init(struct amdgpu_device *adev)
        if (!total)
                return -ENODEV;
 
+       amdgpu_amdkfd_device_probe(adev);
        adev->cg_flags &= amdgpu_cg_mask;
        adev->pg_flags &= amdgpu_pg_mask;
 

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
index 0bf8d75950f72a5bba9c3b8fa2ffc9a0d6ed3a67..e12ff49d01e1c78468b2594db9af3875442fff16 100644 (file)
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
@@ -204,6 +204,14 @@ static void kfd_device_info_init(struct kfd_dev *kfd,
                        /* Navi1x+ */
                        if (gc_version >= IP_VERSION(10, 1, 1))
                                kfd->device_info.needs_pci_atomics = true;
+               } else if (gc_version < IP_VERSION(12, 0, 0)) {
+                       /*
+                        * PCIe atomics support acknowledgment in GFX11 RS64 CPFW requires
+                        * MEC version >= 509. Prior RS64 CPFW versions (and all F32) require
+                        * PCIe atomics support.
+                        */
+                       kfd->device_info.needs_pci_atomics = true;
+                       kfd->device_info.no_atomic_fw_version = kfd->adev->gfx.rs64_enable ? 509 : 0;
                }
        } else {
                kfd->device_info.doorbell_size = 4;

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v11.c b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v11.c
index 4a9af800b1f1cea83a1fc2d707f06b1dede61cfc..04a73324174b88a20ff061ddf535a50b5e45419b 100644 (file)
--- a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v11.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v11.c
@@ -143,6 +143,13 @@ static void init_mqd(struct mqd_manager *mm, void **mqd,
                        1 << CP_HQD_QUANTUM__QUANTUM_SCALE__SHIFT |
                        1 << CP_HQD_QUANTUM__QUANTUM_DURATION__SHIFT;
 
+       /*
+        * GFX11 RS64 CPFW version >= 509 supports PCIe atomics support
+        * acknowledgment.
+        */
+       if (amdgpu_amdkfd_have_atomics_support(mm->dev->adev))
+               m->cp_hqd_hq_status0 |= 1 << 29;
+
        if (q->format == KFD_QUEUE_FORMAT_AQL) {
                m->cp_hqd_aql_control =
                        1 << CP_HQD_AQL_CONTROL__CONTROL0__SHIFT;