arm64: dts: qcom: sc7180: Add iommus property to ETR
authorSai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Tue, 9 Jun 2020 13:30:29 +0000 (19:00 +0530)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Mon, 27 Jul 2020 20:54:39 +0000 (13:54 -0700)
Define iommus property for Coresight ETR component in
SC7180 SoC with the SID and mask to enable SMMU
translation for this master.

Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Link: https://lore.kernel.org/r/2312c9a10e7251d69e31e4f51c0f1d70e6f2f2f5.1591708204.git.saiprakash.ranjan@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
arch/arm64/boot/dts/qcom/sc7180.dtsi

index 7097907a8379e85fc02e28b331ad5aec7c5d5b34..9ad6752c57f7d183843d4840771a2d3518c9016d 100644 (file)
                etr@6048000 {
                        compatible = "arm,coresight-tmc", "arm,primecell";
                        reg = <0 0x06048000 0 0x1000>;
+                       iommus = <&apps_smmu 0x04a0 0x20>;
 
                        clocks = <&aoss_qmp>;
                        clock-names = "apb_pclk";