net: axienet: don't set IRQ timer when IRQ delay not used

When the RX or TX coalesce count is set to 1, there's no point in
setting the delay timer value since an interrupt will already be raised
on every packet, and the delay interrupt just causes extra pointless
interrupts.

Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
index 340c0a20b3f2dfbf5f87c128c693ff882960d9df..44815c4ab4854411b7b2e32e6997405e648042c0 100644 (file)
--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
@@ -236,14 +236,24 @@ static void axienet_dma_start(struct axienet_local *lp)
 
        /* Start updating the Rx channel control register */
        rx_cr = (lp->coalesce_count_rx << XAXIDMA_COALESCE_SHIFT) |
-               (XAXIDMA_DFT_RX_WAITBOUND << XAXIDMA_DELAY_SHIFT) |
-               XAXIDMA_IRQ_ALL_MASK;
+               XAXIDMA_IRQ_IOC_MASK | XAXIDMA_IRQ_ERROR_MASK;
+       /* Only set interrupt delay timer if not generating an interrupt on
+        * the first RX packet. Otherwise leave at 0 to disable delay interrupt.
+        */
+       if (lp->coalesce_count_rx > 1)
+               rx_cr |= (XAXIDMA_DFT_RX_WAITBOUND << XAXIDMA_DELAY_SHIFT) |
+                        XAXIDMA_IRQ_DELAY_MASK;
        axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, rx_cr);
 
        /* Start updating the Tx channel control register */
        tx_cr = (lp->coalesce_count_tx << XAXIDMA_COALESCE_SHIFT) |
-               (XAXIDMA_DFT_TX_WAITBOUND << XAXIDMA_DELAY_SHIFT) |
-               XAXIDMA_IRQ_ALL_MASK;
+               XAXIDMA_IRQ_IOC_MASK | XAXIDMA_IRQ_ERROR_MASK;
+       /* Only set interrupt delay timer if not generating an interrupt on
+        * the first TX packet. Otherwise leave at 0 to disable delay interrupt.
+        */
+       if (lp->coalesce_count_tx > 1)
+               tx_cr |= (XAXIDMA_DFT_TX_WAITBOUND << XAXIDMA_DELAY_SHIFT) |
+                        XAXIDMA_IRQ_DELAY_MASK;
        axienet_dma_out32(lp, XAXIDMA_TX_CR_OFFSET, tx_cr);
 
        /* Populate the tail pointer and bring the Rx Axi DMA engine out of