Merge branch 'for-next/perf-m1' into for-next/perf
authorWill Deacon <will@kernel.org>
Tue, 8 Mar 2022 13:33:34 +0000 (13:33 +0000)
committerWill Deacon <will@kernel.org>
Tue, 8 Mar 2022 13:33:34 +0000 (13:33 +0000)
Support for the CPU PMUs on the Apple M1.

* for-next/perf-m1:
  drivers/perf: Add Apple icestorm/firestorm CPU PMU driver
  drivers/perf: arm_pmu: Handle 47 bit counters
  irqchip/apple-aic: Move PMU-specific registers to their own include file
  arm64: dts: apple: Add t8303 PMU nodes
  arm64: dts: apple: Add t8103 PMU interrupt affinities
  irqchip/apple-aic: Wire PMU interrupts
  irqchip/apple-aic: Parse FIQ affinities from device-tree
  dt-bindings: apple,aic: Add affinity description for per-cpu pseudo-interrupts
  dt-bindings: apple,aic: Add CPU PMU per-cpu pseudo-interrupts
  dt-bindings: arm-pmu: Document Apple PMU compatible strings

1  2 
drivers/perf/Kconfig
drivers/perf/Makefile
drivers/perf/arm_pmu.c

index b9deef6ed423ddd2762516b572d67211a0b02bef,d4fa0dabb05ffe346a709d388fabb7c122d8b9ea..d05ca6ebbb9da3e6e8fad500658639b5a997a941
@@@ -146,13 -146,13 +146,20 @@@ config MARVELL_CN10K_TAD_PM
          Provides support for Last-Level cache Tag-and-data Units (LLC-TAD)
          performance monitors on CN10K family silicons.
  
+ config APPLE_M1_CPU_PMU
+       bool "Apple M1 CPU PMU support"
+       depends on ARM_PMU && ARCH_APPLE
+       help
+         Provides support for the non-architectural CPU PMUs present on
+         the Apple M1 SoCs and derivatives.
  source "drivers/perf/hisilicon/Kconfig"
  
 +config MARVELL_CN10K_DDR_PMU
 +      tristate "Enable MARVELL CN10K DRAM Subsystem(DSS) PMU Support"
 +      depends on ARM64 || (COMPILE_TEST && 64BIT)
 +      help
 +        Enable perf support for Marvell DDR Performance monitoring
 +        event on CN10K platform.
 +
  endmenu
index df52fb5ea2a6bc91b14365aae9538bb650899c88,21ad0832e3d4e1f515d6d40313e14e1dad4c717d..4f43080ec54ea986a53372647cd64d4f3f4cfc5e
@@@ -15,4 -15,4 +15,5 @@@ obj-$(CONFIG_XGENE_PMU) += xgene_pmu.
  obj-$(CONFIG_ARM_SPE_PMU) += arm_spe_pmu.o
  obj-$(CONFIG_ARM_DMC620_PMU) += arm_dmc620_pmu.o
  obj-$(CONFIG_MARVELL_CN10K_TAD_PMU) += marvell_cn10k_tad_pmu.o
 +obj-$(CONFIG_MARVELL_CN10K_DDR_PMU) += marvell_cn10k_ddr_pmu.o
+ obj-$(CONFIG_APPLE_M1_CPU_PMU) += apple_m1_cpu_pmu.o
Simple merge