clk: qcom: ipq5018: drop the CLK_SET_RATE_PARENT flag from GPLL clocks

GPLL clock rates are fixed and shouldn't be scaled based on the
request from dependent clocks. Doing so will result in the unexpected
behaviour. So drop the CLK_SET_RATE_PARENT flag from the GPLL clocks.

----
Changes in V2:
	- New patch

Fixes: e3fdbef1bab8 ("clk: qcom: Add Global Clock controller (GCC) driver for IPQ5018")
Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230913-gpll_cleanup-v2-3-c8ceb1a37680@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/drivers/clk/qcom/gcc-ipq5018.c b/drivers/clk/qcom/gcc-ipq5018.c
index 70f6ade3ac2a725d3cf97aad9fac3cc296f2d761..4aba47e8700d2723ea7613b3a5fbc70fd7a16e12 100644 (file)
--- a/drivers/clk/qcom/gcc-ipq5018.c
+++ b/drivers/clk/qcom/gcc-ipq5018.c
@@ -129,7 +129,6 @@ static struct clk_alpha_pll_postdiv gpll0 = {
                },
                .num_parents = 1,
                .ops = &clk_alpha_pll_postdiv_ro_ops,
-               .flags = CLK_SET_RATE_PARENT,
        },
 };
 
@@ -144,7 +143,6 @@ static struct clk_alpha_pll_postdiv gpll2 = {
                },
                .num_parents = 1,
                .ops = &clk_alpha_pll_postdiv_ro_ops,
-               .flags = CLK_SET_RATE_PARENT,
        },
 };
 
@@ -159,7 +157,6 @@ static struct clk_alpha_pll_postdiv gpll4 = {
                },
                .num_parents = 1,
                .ops = &clk_alpha_pll_postdiv_ro_ops,
-               .flags = CLK_SET_RATE_PARENT,
        },
 };