arm64: dts: qcom: sdm630: Add MMCC node

Add MultiMedia Clock Controller node to allow for accessing
and controlling Multimedia Subsystem clocks by their respective
users.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-4-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index 0dd838ef5d6e87e355e51e4fc04fdb5c97bab37b..e2cbe210048e27db464379d8b54a0b983d02fb45 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -874,6 +874,34 @@
                        status = "disabled";
                };
 
+               mmcc: clock-controller@c8c0000 {
+                       compatible = "qcom,mmcc-sdm630";
+                       reg = <0x0c8c0000 0x40000>;
+                       #clock-cells = <1>;
+                       #reset-cells = <1>;
+                       #power-domain-cells = <1>;
+                       clock-names = "xo",
+                                       "sleep_clk",
+                                       "gpll0",
+                                       "gpll0_div",
+                                       "dsi0pll",
+                                       "dsi0pllbyte",
+                                       "dsi1pll",
+                                       "dsi1pllbyte",
+                                       "dp_link_2x_clk_divsel_five",
+                                       "dp_vco_divided_clk_src_mux";
+                       clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
+                                       <&sleep_clk>,
+                                       <&gcc GCC_MMSS_GPLL0_CLK>,
+                                       <&gcc GCC_MMSS_GPLL0_DIV_CLK>,
+                                       <0>,
+                                       <0>,
+                                       <0>,
+                                       <0>,
+                                       <0>,
+                                       <0>;
+               };
+
                blsp1_dma: dma-controller@c144000 {
                        compatible = "qcom,bam-v1.7.0";
                        reg = <0x0c144000 0x1f000>;