soc: mediatek: pm-domains: Add a meaningful power domain name
authorEnric Balletbo i Serra <enric.balletbo@collabora.com>
Thu, 25 Feb 2021 17:49:57 +0000 (18:49 +0100)
committerMatthias Brugger <matthias.bgg@gmail.com>
Thu, 1 Apr 2021 09:36:04 +0000 (11:36 +0200)
Add the power domains names to the power domain struct so we
have meaningful name for every power domain. This also removes the
following debugfs error message.

  [    2.242068] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
  [    2.249949] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
  [    2.257784] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present!
  ...

Fixes: 59b644b01cf4 ("soc: mediatek: Add MediaTek SCPSYS power domains")
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210225175000.824661-1-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
drivers/soc/mediatek/mt8173-pm-domains.h
drivers/soc/mediatek/mtk-pm-domains.c
drivers/soc/mediatek/mtk-pm-domains.h

index 3e8ee5dabb437290e41679ad2ae1cf69c0d49f1d..654c717e546711e94286e0141b103918ce04d5e0 100644 (file)
 
 static const struct scpsys_domain_data scpsys_domain_data_mt8173[] = {
        [MT8173_POWER_DOMAIN_VDEC] = {
+               .name = "vdec",
                .sta_mask = PWR_STATUS_VDEC,
                .ctl_offs = SPM_VDE_PWR_CON,
                .sram_pdn_bits = GENMASK(11, 8),
                .sram_pdn_ack_bits = GENMASK(12, 12),
        },
        [MT8173_POWER_DOMAIN_VENC] = {
+               .name = "venc",
                .sta_mask = PWR_STATUS_VENC,
                .ctl_offs = SPM_VEN_PWR_CON,
                .sram_pdn_bits = GENMASK(11, 8),
                .sram_pdn_ack_bits = GENMASK(15, 12),
        },
        [MT8173_POWER_DOMAIN_ISP] = {
+               .name = "isp",
                .sta_mask = PWR_STATUS_ISP,
                .ctl_offs = SPM_ISP_PWR_CON,
                .sram_pdn_bits = GENMASK(11, 8),
                .sram_pdn_ack_bits = GENMASK(13, 12),
        },
        [MT8173_POWER_DOMAIN_MM] = {
+               .name = "mm",
                .sta_mask = PWR_STATUS_DISP,
                .ctl_offs = SPM_DIS_PWR_CON,
                .sram_pdn_bits = GENMASK(11, 8),
@@ -40,18 +44,21 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8173[] = {
                },
        },
        [MT8173_POWER_DOMAIN_VENC_LT] = {
+               .name = "venc_lt",
                .sta_mask = PWR_STATUS_VENC_LT,
                .ctl_offs = SPM_VEN2_PWR_CON,
                .sram_pdn_bits = GENMASK(11, 8),
                .sram_pdn_ack_bits = GENMASK(15, 12),
        },
        [MT8173_POWER_DOMAIN_AUDIO] = {
+               .name = "audio",
                .sta_mask = PWR_STATUS_AUDIO,
                .ctl_offs = SPM_AUDIO_PWR_CON,
                .sram_pdn_bits = GENMASK(11, 8),
                .sram_pdn_ack_bits = GENMASK(15, 12),
        },
        [MT8173_POWER_DOMAIN_USB] = {
+               .name = "usb",
                .sta_mask = PWR_STATUS_USB,
                .ctl_offs = SPM_USB_PWR_CON,
                .sram_pdn_bits = GENMASK(11, 8),
@@ -59,18 +66,21 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8173[] = {
                .caps = MTK_SCPD_ACTIVE_WAKEUP,
        },
        [MT8173_POWER_DOMAIN_MFG_ASYNC] = {
+               .name = "mfg_async",
                .sta_mask = PWR_STATUS_MFG_ASYNC,
                .ctl_offs = SPM_MFG_ASYNC_PWR_CON,
                .sram_pdn_bits = GENMASK(11, 8),
                .sram_pdn_ack_bits = 0,
        },
        [MT8173_POWER_DOMAIN_MFG_2D] = {
+               .name = "mfg_2d",
                .sta_mask = PWR_STATUS_MFG_2D,
                .ctl_offs = SPM_MFG_2D_PWR_CON,
                .sram_pdn_bits = GENMASK(11, 8),
                .sram_pdn_ack_bits = GENMASK(13, 12),
        },
        [MT8173_POWER_DOMAIN_MFG] = {
+               .name = "mfg",
                .sta_mask = PWR_STATUS_MFG,
                .ctl_offs = SPM_MFG_PWR_CON,
                .sram_pdn_bits = GENMASK(13, 8),
index 06aaf03b194c045b75629378f17d18e13f4e3335..0af00efa0ef830c3b617bd6ece9e97efc91db3e3 100644 (file)
@@ -438,7 +438,11 @@ generic_pm_domain *scpsys_add_one_domain(struct scpsys *scpsys, struct device_no
                goto err_unprepare_subsys_clocks;
        }
 
-       pd->genpd.name = node->name;
+       if (!pd->data->name)
+               pd->genpd.name = node->name;
+       else
+               pd->genpd.name = pd->data->name;
+
        pd->genpd.power_off = scpsys_power_off;
        pd->genpd.power_on = scpsys_power_on;
 
index 141dc76054e69b2bd1b31869f2973752c8588261..21a4e113bbecb3795ddd0e434a829c31d22ba353 100644 (file)
@@ -76,6 +76,7 @@ struct scpsys_bus_prot_data {
 
 /**
  * struct scpsys_domain_data - scp domain data for power on/off flow
+ * @name: The name of the power domain.
  * @sta_mask: The mask for power on/off status bit.
  * @ctl_offs: The offset for main power control register.
  * @sram_pdn_bits: The mask for sram power control bits.
@@ -85,6 +86,7 @@ struct scpsys_bus_prot_data {
  * @bp_smi: bus protection for smi subsystem
  */
 struct scpsys_domain_data {
+       const char *name;
        u32 sta_mask;
        int ctl_offs;
        u32 sram_pdn_bits;