mmc: sdhci: Add MSI interrupt support for O2 SD host
authorernest.zhang <ernest.zhang@bayhubtech.com>
Mon, 16 Jul 2018 06:26:55 +0000 (14:26 +0800)
committerUlf Hansson <ulf.hansson@linaro.org>
Mon, 30 Jul 2018 12:25:06 +0000 (14:25 +0200)
Add MSI interrupt support if the SD host device can support MSI interrupt.

Signed-off-by: ernest.zhang <ernest.zhang@bayhubtech.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/sdhci-pci-o2micro.c

index 98e26ee1a9728391f83e61400e2c8eeb5a5f8f37..77e9bc4aaee91b894ff34556083f686269f1c64a 100644 (file)
@@ -260,6 +260,29 @@ static void sdhci_pci_o2_fujin2_pci_init(struct sdhci_pci_chip *chip)
        pci_write_config_dword(chip->pdev, O2_SD_MISC_CTRL4, scratch_32);
 }
 
+static void sdhci_pci_o2_enable_msi(struct sdhci_pci_chip *chip,
+                                   struct sdhci_host *host)
+{
+       int ret;
+
+       ret = pci_find_capability(chip->pdev, PCI_CAP_ID_MSI);
+       if (!ret) {
+               pr_info("%s: unsupport msi, use INTx irq\n",
+                       mmc_hostname(host->mmc));
+               return;
+       }
+
+       ret = pci_alloc_irq_vectors(chip->pdev, 1, 1,
+                                   PCI_IRQ_MSI | PCI_IRQ_MSIX);
+       if (ret < 0) {
+               pr_err("%s: enable PCI MSI failed, err=%d\n",
+                      mmc_hostname(host->mmc), ret);
+               return;
+       }
+
+       host->irq = pci_irq_vector(chip->pdev, 0);
+}
+
 int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot)
 {
        struct sdhci_pci_chip *chip;
@@ -279,6 +302,8 @@ int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot)
                if (reg & 0x1)
                        host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12;
 
+               sdhci_pci_o2_enable_msi(chip, host);
+
                if (chip->pdev->device == PCI_DEVICE_ID_O2_SEABIRD0) {
                        ret = pci_read_config_dword(chip->pdev,
                                                    O2_SD_MISC_SETTING, &reg);