target/sh4: Update coding style to make checkpatch.pl happy

Avoid checkpatch.pl warnings in the next commit.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

diff --git a/target/sh4/op_helper.c b/target/sh4/op_helper.c
index 14c3db0f485c78f4e80125d5675e69ed29a2fbda..fcd9ac7271c62ee604208d0b6a14b92e910e677c 100644 (file)
--- a/target/sh4/op_helper.c
+++ b/target/sh4/op_helper.c
@@ -398,9 +398,11 @@ float32 helper_fsrra_FT(CPUSH4State *env, float32 t0)
     /* "Approximate" 1/sqrt(x) via actual computation.  */
     t0 = float32_sqrt(t0, &env->fp_status);
     t0 = float32_div(float32_one, t0, &env->fp_status);
-    /* Since this is supposed to be an approximation, an imprecision
-       exception is required.  One supposes this also follows the usual
-       IEEE rule that other exceptions take precidence.  */
+    /*
+     * Since this is supposed to be an approximation, an imprecision
+     * exception is required.  One supposes this also follows the usual
+     * IEEE rule that other exceptions take precidence.
+     */
     if (get_float_exception_flags(&env->fp_status) == 0) {
         set_float_exception_flags(float_flag_inexact, &env->fp_status);
     }

diff --git a/target/sh4/translate.c b/target/sh4/translate.c
index 60c863d9e1b001b99a6f4a472b3d92d27aa284ba..ec5b04889e19145fb6c1d9f97cf483b3406d640b 100644 (file)
--- a/target/sh4/translate.c
+++ b/target/sh4/translate.c
@@ -1959,9 +1959,11 @@ static void decode_gusa(DisasContext *ctx, CPUSH4State *env)
     NEXT_INSN;
     switch (ctx->opcode & 0xf00f) {
     case 0x6003: /* mov Rm,Rn */
-        /* Here we want to recognize ld_dst being saved for later consumtion,
-           or for another input register being copied so that ld_dst need not
-           be clobbered during the operation.  */
+        /*
+         * Here we want to recognize ld_dst being saved for later consumtion,
+         * or for another input register being copied so that ld_dst need not
+         * be clobbered during the operation.
+         */
         op_dst = B11_8;
         mv_src = B7_4;
         if (op_dst == ld_dst) {