ARM: dts: sun8i: V3/V3s/S3/S3L: add Ethernet support
authorIcenowy Zheng <icenowy@aosc.io>
Wed, 23 Sep 2020 00:57:03 +0000 (08:57 +0800)
committerMaxime Ripard <maxime@cerno.tech>
Mon, 28 Sep 2020 10:09:21 +0000 (12:09 +0200)
The Allwinner V3/V3s/S3L/SoChip S3 Ethernet MAC and internal PHY is quite
similar to the ones on Allwinner H3, except for V3s the external MII is
not wired out.

Add ethernet support to V3/V3s/S3/S3L.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200923005709.147966-2-icenowy@aosc.io
arch/arm/boot/dts/sun8i-v3.dtsi
arch/arm/boot/dts/sun8i-v3s.dtsi

index 6ae8645ade50c29e161fc8a42a026a277e96e502..ca4672ed2e0207a9c46876d3243983302c2bff0d 100644 (file)
@@ -9,6 +9,19 @@
        compatible = "allwinner,sun8i-v3-ccu";
 };
 
+&emac {
+       /delete-property/ phy-handle;
+       /delete-property/ phy-mode;
+};
+
+&mdio_mux {
+       external_mdio: mdio@2 {
+               reg = <2>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+       };
+};
+
 &pio {
        compatible = "allwinner,sun8i-v3-pinctrl";
 };
index 6eb9c39aa93f29b70c69ad788ea1d4d8a2e806f3..7d40897dab09330c6ff3f2798ab9113685ac6d17 100644 (file)
                        };
                };
 
+               syscon: system-control@1c00000 {
+                       compatible = "allwinner,sun8i-v3s-system-control",
+                                    "allwinner,sun8i-h3-system-control";
+                       reg = <0x01c00000 0x1000>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges;
+               };
+
                tcon0: lcd-controller@1c0c000 {
                        compatible = "allwinner,sun8i-v3s-tcon";
                        reg = <0x01c0c000 0x1000>;
                        #size-cells = <0>;
                };
 
+               emac: ethernet@1c30000 {
+                       compatible = "allwinner,sun8i-v3s-emac";
+                       syscon = <&syscon>;
+                       reg = <0x01c30000 0x10000>;
+                       interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "macirq";
+                       resets = <&ccu RST_BUS_EMAC>;
+                       reset-names = "stmmaceth";
+                       clocks = <&ccu CLK_BUS_EMAC>;
+                       clock-names = "stmmaceth";
+                       phy-handle = <&int_mii_phy>;
+                       phy-mode = "mii";
+                       status = "disabled";
+
+                       mdio: mdio {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "snps,dwmac-mdio";
+                       };
+
+                       mdio_mux: mdio-mux {
+                               compatible = "allwinner,sun8i-h3-mdio-mux";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               mdio-parent-bus = <&mdio>;
+                               /* Only one MDIO is usable at the time */
+                               internal_mdio: mdio@1 {
+                                       compatible = "allwinner,sun8i-h3-mdio-internal";
+                                       reg = <1>;
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       int_mii_phy: ethernet-phy@1 {
+                                               compatible = "ethernet-phy-ieee802.3-c22";
+                                               reg = <1>;
+                                               clocks = <&ccu CLK_BUS_EPHY>;
+                                               resets = <&ccu RST_BUS_EPHY>;
+                                       };
+                               };
+                       };
+               };
+
                spi0: spi@1c68000 {
                        compatible = "allwinner,sun8i-h3-spi";
                        reg = <0x01c68000 0x1000>;