return 0xde;
 
                        return readb(addr + SUNXI_MUSB_CONFIGDATA);
+               case MUSB_ULPI_BUSCONTROL:
+                       dev_warn(sunxi_musb->controller->parent,
+                               "sunxi-musb does not have ULPI bus control register\n");
+                       return 0;
                /* Offset for these is fixed by sunxi_musb_busctl_offset() */
                case SUNXI_MUSB_TXFUNCADDR:
                case SUNXI_MUSB_TXHUBADDR:
                        return writeb(data, addr + SUNXI_MUSB_TXFIFOSZ);
                case MUSB_RXFIFOSZ:
                        return writeb(data, addr + SUNXI_MUSB_RXFIFOSZ);
+               case MUSB_ULPI_BUSCONTROL:
+                       dev_warn(sunxi_musb->controller->parent,
+                               "sunxi-musb does not have ULPI bus control register\n");
+                       return;
                /* Offset for these is fixed by sunxi_musb_busctl_offset() */
                case SUNXI_MUSB_TXFUNCADDR:
                case SUNXI_MUSB_TXHUBADDR: