arm64: cpufeature: Remove cpu_has_fwb() check
authorVladimir Murzin <vladimir.murzin@arm.com>
Thu, 24 Feb 2022 16:47:39 +0000 (16:47 +0000)
committerWill Deacon <will@kernel.org>
Fri, 25 Feb 2022 13:52:23 +0000 (13:52 +0000)
cpu_has_fwb() is supposed to warn user is following architectural
requirement is not valid:

LoUU, bits [29:27] - Level of Unification Uniprocessor for the cache
                     hierarchy.

  Note

    When FEAT_S2FWB is implemented, the architecture requires that
    this field is zero so that no levels of data cache need to be
    cleaned in order to manage coherency with instruction fetches.

LoUIS, bits [23:21] - Level of Unification Inner Shareable for the
                      cache hierarchy.

  Note

    When FEAT_S2FWB is implemented, the architecture requires that
    this field is zero so that no levels of data cache need to be
    cleaned in order to manage coherency with instruction fetches.

It is not really clear what user have to do if assertion fires. Having
assertions about the CPU design like this inspire even more assertions
to be added and the kernel definitely is not the right place for that,
so let's remove cpu_has_fwb() altogether.

Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Link: https://lore.kernel.org/r/20220224164739.119168-1-vladimir.murzin@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
arch/arm64/kernel/cpufeature.c

index e5f23dab1c8df8acc56a64d982cb065984167ecb..6d1da359f8041d3a3584dc62a12e40bc58e32252 100644 (file)
@@ -1775,14 +1775,6 @@ static void cpu_copy_el2regs(const struct arm64_cpu_capabilities *__unused)
                write_sysreg(read_sysreg(tpidr_el1), tpidr_el2);
 }
 
-static void cpu_has_fwb(const struct arm64_cpu_capabilities *__unused)
-{
-       u64 val = read_sysreg_s(SYS_CLIDR_EL1);
-
-       /* Check that CLIDR_EL1.LOU{U,IS} are both 0 */
-       WARN_ON(CLIDR_LOUU(val) || CLIDR_LOUIS(val));
-}
-
 #ifdef CONFIG_ARM64_PAN
 static void cpu_enable_pan(const struct arm64_cpu_capabilities *__unused)
 {
@@ -2144,7 +2136,6 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
                .field_pos = ID_AA64MMFR2_FWB_SHIFT,
                .min_field_value = 1,
                .matches = has_cpuid_feature,
-               .cpu_enable = cpu_has_fwb,
        },
        {
                .desc = "ARMv8.4 Translation Table Level",