Move the inclusion out of hw/hw.h, most files do not need it.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
#include "exec/address-spaces.h"
#include "hw/arm/ast2400.h"
#include "hw/char/serial.h"
+#include "qemu/log.h"
#define AST2400_UART_5_BASE 0x00184000
#define AST2400_IOMEM_SIZE 0x00200000
#include "hw/loader.h"
#include "sysemu/block-backend.h"
#include "hw/sysbus.h"
+#include "qemu/log.h"
#include "exec/address-spaces.h"
/* Nokia N8x0 support */
#include "hw/arm/arm.h"
#include "hw/arm/ast2400.h"
#include "hw/boards.h"
+#include "qemu/log.h"
static struct arm_boot_info palmetto_bmc_binfo = {
.loader_start = AST2400_SDRAM_BASE,
#include "hw/hw.h"
#include "hw/sysbus.h"
#include "hw/arm/pxa.h"
+#include "qemu/log.h"
#define PXA2XX_GPIO_BANKS 4
#include "hw/i2c/i2c.h"
#include "net/net.h"
#include "hw/boards.h"
+#include "qemu/log.h"
#include "exec/address-spaces.h"
#include "sysemu/sysemu.h"
#include "sysemu/sysemu.h"
#include "hw/ssi/ssi.h"
#include "qemu/cutils.h"
+#include "qemu/log.h"
//#define DEBUG
#include "hw/boards.h"
#include "qemu/error-report.h"
#include "exec/address-spaces.h"
+#include "qemu/log.h"
typedef struct XlnxEP108 {
XlnxZynqMPState soc;
#include "qemu/osdep.h"
#include "hw/sysbus.h"
+#include "qemu/log.h"
#include "pl041.h"
#include "lm4549.h"
#include "sysemu/blockdev.h"
#include "hw/ssi/ssi.h"
#include "qemu/bitops.h"
+#include "qemu/log.h"
#ifndef M25P80_ERR_DEBUG
#define M25P80_ERR_DEBUG 0
#include "qemu/bitops.h"
#include "exec/address-spaces.h"
#include "qemu/host-utils.h"
+#include "qemu/log.h"
#include "hw/sysbus.h"
#include "sysemu/sysemu.h"
#include "qemu/osdep.h"
#include "hw/char/bcm2835_aux.h"
+#include "qemu/log.h"
#define AUX_IRQ 0x0
#define AUX_ENABLES 0x4
*/
#include "qemu/osdep.h"
+#include "hw/sysbus.h"
+#include "sysemu/char.h"
+#include "qemu/timer.h"
+#include "qemu/log.h"
#include "hw/char/cadence_uart.h"
#ifdef CADENCE_UART_ERR_DEBUG
#include "hw/hw.h"
#include "hw/sysbus.h"
#include "sysemu/char.h"
+#include "qemu/log.h"
#include "hw/char/digic-uart.h"
#include "hw/char/imx_serial.h"
#include "sysemu/sysemu.h"
#include "sysemu/char.h"
+#include "qemu/log.h"
#ifndef DEBUG_IMX_UART
#define DEBUG_IMX_UART 0
#include "qemu/osdep.h"
#include "hw/sysbus.h"
#include "sysemu/char.h"
+#include "qemu/log.h"
#define TYPE_PL011 "pl011"
#define PL011(obj) OBJECT_CHECK(PL011State, (obj), TYPE_PL011)
#include "qemu/osdep.h"
#include "hw/char/stm32f2xx_usart.h"
+#include "qemu/log.h"
#ifndef STM_USART_ERR_DEBUG
#define STM_USART_ERR_DEBUG 0
#include "hw/display/framebuffer.h"
#include "ui/pixel_ops.h"
#include "hw/misc/bcm2835_mbox_defs.h"
+#include "qemu/log.h"
#define DEFAULT_VCRAM_SIZE 0x4000000
#define BCM2835_FB_OFFSET 0x00100000
#include "ui/console.h"
#include "hw/sysbus.h"
#include "hw/loader.h"
+#include "qemu/log.h"
/* Change to 1 to enable debugging */
#define DEBUG_CG3 0
#include "ui/console.h"
#include "framebuffer.h"
#include "ui/pixel_ops.h"
+#include "qemu/log.h"
#define PL110_CR_EN 0x001
#define PL110_CR_BGR 0x100
#include "hw/virtio/virtio.h"
#include "hw/virtio/virtio-gpu.h"
#include "hw/virtio/virtio-bus.h"
+#include "qemu/log.h"
static struct virtio_gpu_simple_resource*
virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id);
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "hw/dma/bcm2835_dma.h"
+#include "qemu/log.h"
/* DMA CS Control and Status bits */
#define BCM2708_DMA_ACTIVE (1 << 0)
#include "qemu/osdep.h"
#include "hw/sysbus.h"
#include "exec/address-spaces.h"
+#include "qemu/log.h"
#define PL080_MAX_CHANNELS 8
#define PL080_CONF_E 0x1
#include "qapi/error.h"
#include "qemu/timer.h"
#include "sysemu/dma.h"
+#include "qemu/log.h"
#ifndef PL330_ERR_DEBUG
#define PL330_ERR_DEBUG 0
#include "hw/mips/mips.h"
#include "hw/sysbus.h"
#include "qemu/timer.h"
+#include "qemu/log.h"
#include "exec/address-spaces.h"
#include "trace.h"
#include "qemu/osdep.h"
#include "hw/gpio/imx_gpio.h"
+#include "qemu/log.h"
#ifndef DEBUG_IMX_GPIO
#define DEBUG_IMX_GPIO 0
#include "qemu/osdep.h"
#include "hw/sysbus.h"
+#include "qemu/log.h"
//#define DEBUG_PL061 1
#include "qemu/osdep.h"
#include "hw/i2c/imx_i2c.h"
#include "hw/i2c/i2c.h"
+#include "qemu/log.h"
#ifndef DEBUG_IMX_I2C
#define DEBUG_IMX_I2C 0
#include "qemu/osdep.h"
#include "hw/sysbus.h"
#include "bitbang_i2c.h"
+#include "qemu/log.h"
#define TYPE_VERSATILE_I2C "versatile_i2c"
#define VERSATILE_I2C(obj) \
#include "qemu/osdep.h"
#include "hw/sysbus.h"
#include "hw/input/ps2.h"
+#include "qemu/log.h"
#define TYPE_PL050 "pl050"
#define PL050(obj) OBJECT_CHECK(PL050State, (obj), TYPE_PL050)
#include "hw/devices.h"
#include "sysemu/sysemu.h"
#include "hw/intc/allwinner-a10-pic.h"
+#include "qemu/log.h"
static void aw_a10_pic_update(AwA10PICState *s)
{
#include "gic_internal.h"
#include "qapi/error.h"
#include "qom/cpu.h"
+#include "qemu/log.h"
#include "trace.h"
//#define DEBUG_GIC
#include "hw/sysbus.h"
#include "hw/pci/msi.h"
#include "sysemu/kvm.h"
+#include "qemu/log.h"
#define TYPE_ARM_GICV2M "arm-gicv2m"
#define ARM_GICV2M(obj) OBJECT_CHECK(ARMGICv2mState, (obj), TYPE_ARM_GICV2M)
#include "hw/arm/arm.h"
#include "exec/address-spaces.h"
#include "gic_internal.h"
+#include "qemu/log.h"
typedef struct {
GICState gic;
#include "qemu/osdep.h"
#include "hw/intc/bcm2835_ic.h"
+#include "qemu/log.h"
#define GPU_IRQS 64
#define ARM_IRQS 8
#include "qemu/osdep.h"
#include "hw/intc/bcm2836_control.h"
+#include "qemu/log.h"
#define REG_GPU_ROUTE 0x0c
#define REG_TIMERCONTROL 0x40
#include "hw/isa/isa.h"
#include "monitor/monitor.h"
#include "qemu/timer.h"
+#include "qemu/log.h"
#include "hw/isa/i8259_internal.h"
/* debug PIC */
#include "qemu/osdep.h"
#include "hw/intc/imx_avic.h"
+#include "qemu/log.h"
#ifndef DEBUG_IMX_AVIC
#define DEBUG_IMX_AVIC 0
#include "qapi/error.h"
#include "qemu/bitops.h"
#include "qapi/qmp/qerror.h"
+#include "qemu/log.h"
//#define DEBUG_OPENPIC
#include "qemu/osdep.h"
#include "hw/sysbus.h"
+#include "qemu/log.h"
/* The number of virtual priority levels. 16 user vectors plus the
unvectored IRQ. Chained interrupts would require an additional level
#include "qemu/osdep.h"
#include "hw/misc/arm11scu.h"
+#include "qemu/log.h"
static uint64_t mpcore_scu_read(void *opaque, hwaddr offset,
unsigned size)
#include "hw/sysbus.h"
#include "exec/address-spaces.h"
#include "hw/misc/arm_integrator_debug.h"
+#include "qemu/log.h"
#define INTEGRATOR_DEBUG(obj) \
OBJECT_CHECK(IntegratorDebugState, (obj), TYPE_INTEGRATOR_DEBUG)
#include "qemu/osdep.h"
#include "hw/sysbus.h"
+#include "qemu/log.h"
/* L2C-310 r3p2 */
#define CACHE_ID 0x410000c8
#include "hw/sysbus.h"
#include "hw/arm/primecell.h"
#include "sysemu/sysemu.h"
+#include "qemu/log.h"
#define LOCK_VALUE 0xa05f
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "hw/misc/bcm2835_mbox.h"
+#include "qemu/log.h"
#define MAIL0_PEEK 0x90
#define MAIL0_SENDER 0x94
#include "hw/misc/bcm2835_property.h"
#include "hw/misc/bcm2835_mbox_defs.h"
#include "sysemu/dma.h"
+#include "qemu/log.h"
/* https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface */
#include "qemu/osdep.h"
#include "hw/misc/imx25_ccm.h"
+#include "qemu/log.h"
#ifndef DEBUG_IMX25_CCM
#define DEBUG_IMX25_CCM 0
#include "qemu/osdep.h"
#include "hw/misc/imx31_ccm.h"
+#include "qemu/log.h"
#define CKIH_FREQ 26000000 /* 26MHz crystal input */
#include "qemu/osdep.h"
#include "hw/misc/imx6_ccm.h"
+#include "qemu/log.h"
#ifndef DEBUG_IMX6_CCM
#define DEBUG_IMX6_CCM 0
#include "hw/misc/imx6_src.h"
#include "sysemu/sysemu.h"
#include "qemu/bitops.h"
+#include "qemu/log.h"
#include "arm-powerctl.h"
#ifndef DEBUG_IMX6_SRC
#include "qemu/osdep.h"
#include "hw/misc/imx_ccm.h"
+#include "qemu/log.h"
#ifndef DEBUG_IMX_CCM
#define DEBUG_IMX_CCM 0
#include "qemu/timer.h"
#include "sysemu/sysemu.h"
#include "qemu/cutils.h"
+#include "qemu/log.h"
/* XXX: implement all timer modes */
#include "hw/isa/isa.h"
#include "hw/ppc/mac_dbdma.h"
#include "qemu/main-loop.h"
+#include "qemu/log.h"
/* debug DBDMA */
//#define DEBUG_DBDMA
#include "qemu/osdep.h"
#include "qapi/error.h"
+#include "qemu/log.h"
#include "hw/hw.h"
#include "hw/sysbus.h"
#include "sysemu/sysemu.h"
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "cpu.h"
+#include "qemu/log.h"
#include "hw/sysbus.h"
#include "hw/misc/mips_cpc.h"
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "cpu.h"
+#include "qemu/log.h"
#include "hw/hw.h"
#include "hw/sysbus.h"
#include "sysemu/sysemu.h"
#include "qemu/osdep.h"
#include "hw/misc/stm32f2xx_syscfg.h"
+#include "qemu/log.h"
#ifndef STM_SYSCFG_ERR_DEBUG
#define STM_SYSCFG_ERR_DEBUG 0
#include "hw/misc/zynq-xadc.h"
#include "qemu/timer.h"
#include "sysemu/sysemu.h"
+#include "qemu/log.h"
enum {
CFG = 0x000 / 4,
#include "qemu/timer.h"
#include "hw/sysbus.h"
#include "sysemu/sysemu.h"
+#include "qemu/log.h"
#ifndef ZYNQ_SLCR_ERR_DEBUG
#define ZYNQ_SLCR_ERR_DEBUG 0
#include "net/net.h"
#include "qemu/fifo8.h"
#include "hw/net/allwinner_emac.h"
+#include "qemu/log.h"
#include <zlib.h>
static uint8_t padding[60];
#include "hw/ptimer.h"
#include "etsec.h"
#include "registers.h"
+#include "qemu/log.h"
/* #define HEX_DUMP */
/* #define DEBUG_REGISTER */
*/
#include "qemu/osdep.h"
#include "net/checksum.h"
-
+#include "qemu/log.h"
#include "etsec.h"
#include "registers.h"
#include "qemu/osdep.h"
#include "hw/net/imx_fec.h"
#include "sysemu/dma.h"
+#include "qemu/log.h"
/* For crc32 */
#include <zlib.h>
#include "hw/devices.h"
#include "sysemu/sysemu.h"
#include "hw/ptimer.h"
+#include "qemu/log.h"
/* For crc32 */
#include <zlib.h>
#include "qemu-common.h"
#include "cpu.h"
#include "hw/hw.h"
+#include "qemu/log.h"
#include "net/net.h"
#include "hw/qdev.h"
#include "hw/ppc/spapr.h"
#include "hw/pci-host/apb.h"
#include "sysemu/sysemu.h"
#include "exec/address-spaces.h"
+#include "qemu/log.h"
/* debug APB */
//#define DEBUG_APB
#include "hw/pci/pci_bus.h"
#include "hw/pci/pci_host.h"
#include "exec/address-spaces.h"
+#include "qemu/log.h"
/* Old and buggy versions of QEMU used the wrong mapping from
* PCI IRQs to system interrupt lines. Unfortunately the Linux
#include "sysemu/sysemu.h"
#include "sysemu/numa.h"
#include "hw/hw.h"
+#include "qemu/log.h"
#include "hw/fw-path-provider.h"
#include "elf.h"
#include "net/net.h"
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "sysemu/sysemu.h"
+#include "qemu/log.h"
#include "cpu.h"
#include "helper_regs.h"
#include "hw/ppc/spapr.h"
*/
#include "qemu/osdep.h"
#include "hw/hw.h"
+#include "qemu/log.h"
#include "sysemu/kvm.h"
#include "hw/qdev.h"
#include "kvm_ppc.h"
*/
#include "qemu/osdep.h"
#include "cpu.h"
+#include "qemu/log.h"
#include "sysemu/sysemu.h"
#include "sysemu/char.h"
#include "hw/qdev.h"
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "hw/hw.h"
+#include "qemu/log.h"
#include "sysemu/sysemu.h"
#include "hw/boards.h"
#include "hw/loader.h"
#include "sysemu/blockdev.h"
#include "hw/sysbus.h"
#include "hw/sd/sd.h"
+#include "qemu/log.h"
//#define DEBUG_PL181 1
#include "hw/qdev-properties.h"
#include "qemu/error-report.h"
#include "qemu/timer.h"
+#include "qemu/log.h"
//#define DEBUG_SD 1
#include "qemu/timer.h"
#include "qemu/bitops.h"
#include "sdhci-internal.h"
+#include "qemu/log.h"
/* host controller debug messages */
#ifndef SDHC_DEBUG
#include "qemu/osdep.h"
#include "hw/ssi/imx_spi.h"
#include "sysemu/sysemu.h"
+#include "qemu/log.h"
#ifndef DEBUG_IMX_SPI
#define DEBUG_IMX_SPI 0
#include "qemu/osdep.h"
#include "hw/sysbus.h"
#include "hw/ssi/ssi.h"
+#include "qemu/log.h"
//#define DEBUG_PL022 1
#include "hw/sysbus.h"
#include "sysemu/sysemu.h"
#include "hw/timer/allwinner-a10-pit.h"
+#include "qemu/log.h"
static void a10_pit_update_irq(AwA10PITState *s)
{
#include "hw/qdev.h"
#include "hw/ptimer.h"
#include "qemu/main-loop.h"
+#include "qemu/log.h"
/* Common timer implementation. */
#include "hw/sysbus.h"
#include "hw/ptimer.h"
#include "qemu/main-loop.h"
+#include "qemu/log.h"
#include "hw/timer/digic-timer.h"
#include "hw/timer/imx_epit.h"
#include "hw/misc/imx_ccm.h"
#include "qemu/main-loop.h"
+#include "qemu/log.h"
#ifndef DEBUG_IMX_EPIT
#define DEBUG_IMX_EPIT 0
#include "hw/timer/imx_gpt.h"
#include "hw/misc/imx_ccm.h"
#include "qemu/main-loop.h"
+#include "qemu/log.h"
#ifndef DEBUG_IMX_GPT
#define DEBUG_IMX_GPT 0
#include "qemu/timer.h"
#include "sysemu/sysemu.h"
#include "qemu/cutils.h"
+#include "qemu/log.h"
//#define DEBUG_PL031
#include "qemu/osdep.h"
#include "hw/timer/stm32f2xx_timer.h"
+#include "qemu/log.h"
#ifndef STM_TIMER_ERR_DEBUG
#define STM_TIMER_ERR_DEBUG 0
#include "hw/sysbus.h"
#include "qemu/timer.h"
#include "hw/watchdog/wdt_diag288.h"
+#include "qemu/log.h"
static WatchdogTimerModel model = {
.wdt_name = TYPE_WDT_DIAG288,
#include "hw/irq.h"
#include "block/aio.h"
#include "migration/vmstate.h"
-#include "qemu/log.h"
#include "qemu/module.h"
typedef void QEMUResetHandler(void *opaque);
#include "trace/simple.h"
#endif
#include "exec/memory.h"
+#include "qemu/log.h"
#include "qmp-commands.h"
#include "hmp.h"
#include "qemu/thread.h"
#include <cpu-qom.h>
#include "internals.h"
#include "arm-powerctl.h"
+#include "qemu/log.h"
#ifndef DEBUG_ARM_POWERCTL
#define DEBUG_ARM_POWERCTL 0
#include "hw/arm/arm.h"
#include "exec/memattrs.h"
#include "hw/boards.h"
+#include "qemu/log.h"
const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
KVM_CAP_LAST_INFO
#include "kvm_arm.h"
#include "internals.h"
#include "hw/arm/arm.h"
+#include "qemu/log.h"
static inline void set_feature(uint64_t *features, int feature)
{
#include "qemu/timer.h"
#include "sysemu/char.h"
#include "qemu/bitmap.h"
+#include "qemu/log.h"
#include "sysemu/blockdev.h"
#include "hw/block/block.h"
#include "migration/block.h"