arm64: dts: exynos: drop useless 'dma-channels/requests' properties
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Sat, 30 Apr 2022 12:19:01 +0000 (14:19 +0200)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Wed, 4 May 2022 08:21:46 +0000 (10:21 +0200)
The pl330 DMA controller provides number of DMA channels and requests
through its registers, so duplicating this information (with a chance of
mistakes) in DTS is pointless.  Additionally the DTS used always wrong
property names which causes DT schema check failures - the bindings
documented 'dma-channels' and 'dma-requests' properties without leading
hash sign.

Reported-by: Rob Herring <robh@kernel.org>
Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220430121902.59895-9-krzysztof.kozlowski@linaro.org
arch/arm64/boot/dts/exynos/exynos5433.dtsi
arch/arm64/boot/dts/exynos/exynos7.dtsi

index 017ccc2f46504082003a765717fc204bc5f30d79..75b548e495a0f22d7d39727322179e9edd58fdf2 100644 (file)
                        clocks = <&cmu_fsys CLK_PDMA0>;
                        clock-names = "apb_pclk";
                        #dma-cells = <1>;
-                       #dma-channels = <8>;
-                       #dma-requests = <32>;
                };
 
                pdma1: dma-controller@15600000 {
                        clocks = <&cmu_fsys CLK_PDMA1>;
                        clock-names = "apb_pclk";
                        #dma-cells = <1>;
-                       #dma-channels = <8>;
-                       #dma-requests = <32>;
                };
 
                audio-subsystem@11400000 {
                                clocks = <&cmu_aud CLK_ACLK_DMAC>;
                                clock-names = "apb_pclk";
                                #dma-cells = <1>;
-                               #dma-channels = <8>;
-                               #dma-requests = <32>;
                                power-domains = <&pd_aud>;
                        };
 
index e38bb02a21529fc4bb80eb604e69bfb927d92add..1cd771c90b47126cd35beefd9ab3ae3493cf642e 100644 (file)
                        clocks = <&clock_fsys0 ACLK_PDMA0>;
                        clock-names = "apb_pclk";
                        #dma-cells = <1>;
-                       #dma-channels = <8>;
-                       #dma-requests = <32>;
                };
 
                pdma1: dma-controller@10eb0000 {
                        clocks = <&clock_fsys0 ACLK_PDMA1>;
                        clock-names = "apb_pclk";
                        #dma-cells = <1>;
-                       #dma-channels = <8>;
-                       #dma-requests = <32>;
                };
 
                clock_topc: clock-controller@10570000 {