clk: imx7ulp: remove snvs clock
authorAnson Huang <anson.huang@nxp.com>
Thu, 28 Feb 2019 08:56:00 +0000 (08:56 +0000)
committerShawn Guo <shawnguo@kernel.org>
Wed, 20 Mar 2019 07:59:52 +0000 (15:59 +0800)
Since i.MX7ULP B0 chip, the SNVS module is moved into M4
domain and its clock is also moved into PCC0 which is
contorlled by M4, Linux kernel should NOT add it into
clock tree.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
drivers/clk/imx/clk-imx7ulp.c

index ce306631e84410d007afea1543a1c85df32fd0b7..66682100f14c950ed31db5fd68f1fc4ad6274630 100644 (file)
@@ -151,7 +151,6 @@ static void __init imx7ulp_clk_pcc2_init(struct device_node *np)
        clks[IMX7ULP_CLK_DMA1]          = imx_clk_hw_gate("dma1", "nic1_clk", base + 0x20, 30);
        clks[IMX7ULP_CLK_RGPIO2P1]      = imx_clk_hw_gate("rgpio2p1", "nic1_bus_clk", base + 0x3c, 30);
        clks[IMX7ULP_CLK_DMA_MUX1]      = imx_clk_hw_gate("dma_mux1", "nic1_bus_clk", base + 0x84, 30);
-       clks[IMX7ULP_CLK_SNVS]          = imx_clk_hw_gate("snvs", "nic1_bus_clk", base + 0x8c, 30);
        clks[IMX7ULP_CLK_CAAM]          = imx_clk_hw_gate("caam", "nic1_clk", base + 0x90, 30);
        clks[IMX7ULP_CLK_LPTPM4]        = imx7ulp_clk_composite("lptpm4",  periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0x94);
        clks[IMX7ULP_CLK_LPTPM5]        = imx7ulp_clk_composite("lptpm5",  periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0x98);