dt-bindings: change the macro name of prci in header files and example

We currently change the macro name for fu540 and fu740 by adding the
prefix respectively, the dt-bindings should be modified as well.

Signed-off-by: Zong Li <zong.li@sifive.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Link: https://lore.kernel.org/r/f9284873c2993a9952d9fe4f8dd5e89f20daab75.1646388139.git.zong.li@sifive.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

diff --git a/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml b/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml
index e04349567eebb72c35e4bbd0893bd5acff33a961..8d3c126fe1642a92f379f0e539a927a775db49b2 100644 (file)
--- a/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml
+++ b/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml
@@ -80,7 +80,7 @@ examples:
         interrupts = <7>, <8>, <9>, <10>, <11>, <12>, <13>, <14>, <15>, <16>,
                      <17>, <18>, <19>, <20>, <21>, <22>;
         reg = <0x10060000 0x1000>;
-        clocks = <&tlclk PRCI_CLK_TLCLK>;
+        clocks = <&tlclk FU540_PRCI_CLK_TLCLK>;
         gpio-controller;
         #gpio-cells = <2>;
         interrupt-controller;

diff --git a/Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml b/Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml
index 392f0ab488c24b0778ccb4237d5ecd5fed2328d6..195e6afeb16944feab1d366c6cc3d98c3d85d00f 100644 (file)
--- a/Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml
@@ -104,7 +104,7 @@ examples:
                             <0x0 0x0 0x0 0x2 &plic0 58>,
                             <0x0 0x0 0x0 0x3 &plic0 59>,
                             <0x0 0x0 0x0 0x4 &plic0 60>;
-            clocks = <&prci PRCI_CLK_PCIE_AUX>;
+            clocks = <&prci FU740_PRCI_CLK_PCIE_AUX>;
             resets = <&prci 4>;
             pwren-gpios = <&gpio 5 0>;
             reset-gpios = <&gpio 8 0>;

diff --git a/Documentation/devicetree/bindings/serial/sifive-serial.yaml b/Documentation/devicetree/bindings/serial/sifive-serial.yaml
index 09aae43f65a7f4a77b8773d5707e740225ec6d02..b0a8871e36411ce896a153151104da046fe380c7 100644 (file)
--- a/Documentation/devicetree/bindings/serial/sifive-serial.yaml
+++ b/Documentation/devicetree/bindings/serial/sifive-serial.yaml
@@ -59,7 +59,7 @@ examples:
         interrupt-parent = <&plic0>;
         interrupts = <80>;
         reg = <0x10010000 0x1000>;
-        clocks = <&prci PRCI_CLK_TLCLK>;
+        clocks = <&prci FU540_PRCI_CLK_TLCLK>;
       };
 
 ...

diff --git a/include/dt-bindings/clock/sifive-fu540-prci.h b/include/dt-bindings/clock/sifive-fu540-prci.h
index 3b21d0522c914981812831adf6e2225a48ec02d0..5af372e8385f8fd98ec19d53efbd28028a7c6316 100644 (file)
--- a/include/dt-bindings/clock/sifive-fu540-prci.h
+++ b/include/dt-bindings/clock/sifive-fu540-prci.h
@@ -10,9 +10,9 @@
 
 /* Clock indexes for use by Device Tree data and the PRCI driver */
 
-#define PRCI_CLK_COREPLL              0
-#define PRCI_CLK_DDRPLL                       1
-#define PRCI_CLK_GEMGXLPLL            2
-#define PRCI_CLK_TLCLK                3
+#define FU540_PRCI_CLK_COREPLL         0
+#define FU540_PRCI_CLK_DDRPLL          1
+#define FU540_PRCI_CLK_GEMGXLPLL       2
+#define FU540_PRCI_CLK_TLCLK           3
 
 #endif

diff --git a/include/dt-bindings/clock/sifive-fu740-prci.h b/include/dt-bindings/clock/sifive-fu740-prci.h
index 7899b7fee7dbd7c35f873e23fe7b1ab4c3980b0b..672bdadbf6c01c9c1d9e1848f8605f2b6f4cf8d9 100644 (file)
--- a/include/dt-bindings/clock/sifive-fu740-prci.h
+++ b/include/dt-bindings/clock/sifive-fu740-prci.h
@@ -11,14 +11,14 @@
 
 /* Clock indexes for use by Device Tree data and the PRCI driver */
 
-#define PRCI_CLK_COREPLL              0
-#define PRCI_CLK_DDRPLL                       1
-#define PRCI_CLK_GEMGXLPLL            2
-#define PRCI_CLK_DVFSCOREPLL          3
-#define PRCI_CLK_HFPCLKPLL            4
-#define PRCI_CLK_CLTXPLL              5
-#define PRCI_CLK_TLCLK                6
-#define PRCI_CLK_PCLK                 7
-#define PRCI_CLK_PCIE_AUX             8
+#define FU740_PRCI_CLK_COREPLL         0
+#define FU740_PRCI_CLK_DDRPLL          1
+#define FU740_PRCI_CLK_GEMGXLPLL       2
+#define FU740_PRCI_CLK_DVFSCOREPLL     3
+#define FU740_PRCI_CLK_HFPCLKPLL       4
+#define FU740_PRCI_CLK_CLTXPLL         5
+#define FU740_PRCI_CLK_TLCLK           6
+#define FU740_PRCI_CLK_PCLK            7
+#define FU740_PRCI_CLK_PCIE_AUX                8
 
 #endif /* __DT_BINDINGS_CLOCK_SIFIVE_FU740_PRCI_H */