tcg: Make tb arg to synchronize_from_tb const
authorRichard Henderson <richard.henderson@linaro.org>
Thu, 29 Oct 2020 19:30:01 +0000 (12:30 -0700)
committerRichard Henderson <richard.henderson@linaro.org>
Thu, 7 Jan 2021 15:09:41 +0000 (05:09 -1000)
There is nothing within the translators that ought to be
changing the TranslationBlock data, so make it const.

This does not actually use the read-only copy of the
data structure that exists within the rx region.

Reviewed-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
12 files changed:
include/hw/core/cpu.h
target/arm/cpu.c
target/avr/cpu.c
target/hppa/cpu.c
target/i386/tcg/tcg-cpu.c
target/microblaze/cpu.c
target/mips/cpu.c
target/riscv/cpu.c
target/rx/cpu.c
target/sh4/cpu.c
target/sparc/cpu.c
target/tricore/cpu.c

index 8e7552910de0df36dbc01ba92eaca9358d2362bb..140fa32a5e386dce03085cbab8b262dcd7df026e 100644 (file)
@@ -189,7 +189,8 @@ struct CPUClass {
     void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list,
                                Error **errp);
     void (*set_pc)(CPUState *cpu, vaddr value);
-    void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb);
+    void (*synchronize_from_tb)(CPUState *cpu,
+                                const struct TranslationBlock *tb);
     bool (*tlb_fill)(CPUState *cpu, vaddr address, int size,
                      MMUAccessType access_type, int mmu_idx,
                      bool probe, uintptr_t retaddr);
index d6188f6566a1be50c39db5f88cd41d6dc38fd5fb..62e319eb6ad4677b70581db7200dd5f34f5b299d 100644 (file)
@@ -54,7 +54,8 @@ static void arm_cpu_set_pc(CPUState *cs, vaddr value)
     }
 }
 
-static void arm_cpu_synchronize_from_tb(CPUState *cs, TranslationBlock *tb)
+static void arm_cpu_synchronize_from_tb(CPUState *cs,
+                                        const TranslationBlock *tb)
 {
     ARMCPU *cpu = ARM_CPU(cs);
     CPUARMState *env = &cpu->env;
index 5d9c4ad5bff8a6cf4e46237246c30cda35b7fd2d..6f3d5a9e4a75076aa8c746469dee5f0f07beaaa5 100644 (file)
@@ -41,7 +41,8 @@ static bool avr_cpu_has_work(CPUState *cs)
             && cpu_interrupts_enabled(env);
 }
 
-static void avr_cpu_synchronize_from_tb(CPUState *cs, TranslationBlock *tb)
+static void avr_cpu_synchronize_from_tb(CPUState *cs,
+                                        const TranslationBlock *tb)
 {
     AVRCPU *cpu = AVR_CPU(cs);
     CPUAVRState *env = &cpu->env;
index 71b6aca45d6197f78982fb3b4c53cee3e2d237a3..e28f047d10c486da60cc6e1e70f8268031715e11 100644 (file)
@@ -35,7 +35,8 @@ static void hppa_cpu_set_pc(CPUState *cs, vaddr value)
     cpu->env.iaoq_b = value + 4;
 }
 
-static void hppa_cpu_synchronize_from_tb(CPUState *cs, TranslationBlock *tb)
+static void hppa_cpu_synchronize_from_tb(CPUState *cs,
+                                         const TranslationBlock *tb)
 {
     HPPACPU *cpu = HPPA_CPU(cs);
 
index 628dd29fe7b3cb74fe9010fda58a42b611fc3478..4fa013720e757ad3e103500927225a2d0a8e1e84 100644 (file)
@@ -49,7 +49,8 @@ static void x86_cpu_exec_exit(CPUState *cs)
     env->eflags = cpu_compute_eflags(env);
 }
 
-static void x86_cpu_synchronize_from_tb(CPUState *cs, TranslationBlock *tb)
+static void x86_cpu_synchronize_from_tb(CPUState *cs,
+                                        const TranslationBlock *tb)
 {
     X86CPU *cpu = X86_CPU(cs);
 
index 9b2482159d18ed714999664fc32aa7b722611704..c8e754cfb1cf748f7cd8c4d2746e8d1d6aa625a1 100644 (file)
@@ -83,7 +83,8 @@ static void mb_cpu_set_pc(CPUState *cs, vaddr value)
     cpu->env.iflags = 0;
 }
 
-static void mb_cpu_synchronize_from_tb(CPUState *cs, TranslationBlock *tb)
+static void mb_cpu_synchronize_from_tb(CPUState *cs,
+                                       const TranslationBlock *tb)
 {
     MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs);
 
index 2283214c8798d6e840e1437dad0ccf7282f29223..b2864d67d7f4f028e38479b79f796acbbfaedbc5 100644 (file)
@@ -47,7 +47,8 @@ static void mips_cpu_set_pc(CPUState *cs, vaddr value)
     }
 }
 
-static void mips_cpu_synchronize_from_tb(CPUState *cs, TranslationBlock *tb)
+static void mips_cpu_synchronize_from_tb(CPUState *cs,
+                                         const TranslationBlock *tb)
 {
     MIPSCPU *cpu = MIPS_CPU(cs);
     CPUMIPSState *env = &cpu->env;
index 254cd83f8be5d468136ab31a125836e60f9276a0..8227d7aea9dc96ee98826a51dab226cf6026dac4 100644 (file)
@@ -314,7 +314,8 @@ static void riscv_cpu_set_pc(CPUState *cs, vaddr value)
     env->pc = value;
 }
 
-static void riscv_cpu_synchronize_from_tb(CPUState *cs, TranslationBlock *tb)
+static void riscv_cpu_synchronize_from_tb(CPUState *cs,
+                                          const TranslationBlock *tb)
 {
     RISCVCPU *cpu = RISCV_CPU(cs);
     CPURISCVState *env = &cpu->env;
index 23ee17a701876947b6cf64018dc47668a7993972..2bb14144a7e39446927146987031827a22ed0839 100644 (file)
@@ -33,7 +33,8 @@ static void rx_cpu_set_pc(CPUState *cs, vaddr value)
     cpu->env.pc = value;
 }
 
-static void rx_cpu_synchronize_from_tb(CPUState *cs, TranslationBlock *tb)
+static void rx_cpu_synchronize_from_tb(CPUState *cs,
+                                       const TranslationBlock *tb)
 {
     RXCPU *cpu = RX_CPU(cs);
 
index 3c68021c5650eb0bc36c135bc7d40866d1cf3cc5..1e0f05a15b1dbef3d50f910cf23c3a7bd888bf3f 100644 (file)
@@ -34,7 +34,8 @@ static void superh_cpu_set_pc(CPUState *cs, vaddr value)
     cpu->env.pc = value;
 }
 
-static void superh_cpu_synchronize_from_tb(CPUState *cs, TranslationBlock *tb)
+static void superh_cpu_synchronize_from_tb(CPUState *cs,
+                                           const TranslationBlock *tb)
 {
     SuperHCPU *cpu = SUPERH_CPU(cs);
 
index d8a8bb1ddaf88a1a0a2514ae736a7885e325322a..6f14e370ed8387d93afcbcf1b72934d07719744a 100644 (file)
@@ -691,7 +691,8 @@ static void sparc_cpu_set_pc(CPUState *cs, vaddr value)
     cpu->env.npc = value + 4;
 }
 
-static void sparc_cpu_synchronize_from_tb(CPUState *cs, TranslationBlock *tb)
+static void sparc_cpu_synchronize_from_tb(CPUState *cs,
+                                          const TranslationBlock *tb)
 {
     SPARCCPU *cpu = SPARC_CPU(cs);
 
index 2f2e5b029fe36c41e65ebcceb2b2570186f9575c..4bff1d4718be4c762101b0c62dab77ff947a74d4 100644 (file)
@@ -42,7 +42,7 @@ static void tricore_cpu_set_pc(CPUState *cs, vaddr value)
 }
 
 static void tricore_cpu_synchronize_from_tb(CPUState *cs,
-                                            TranslationBlock *tb)
+                                            const TranslationBlock *tb)
 {
     TriCoreCPU *cpu = TRICORE_CPU(cs);
     CPUTriCoreState *env = &cpu->env;