projects
/
linux.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
7dd5bc5
)
arm64: dts: mt8195: Specify audio reset controller
author
Trevor Wu
<trevor.wu@mediatek.com>
Thu, 11 Aug 2022 02:58:10 +0000
(10:58 +0800)
committer
Matthias Brugger
<matthias.bgg@gmail.com>
Thu, 25 Aug 2022 14:48:31 +0000
(16:48 +0200)
Specify audio reset controller for audio hardware resetting.
Signed-off-by: Trevor Wu <trevor.wu@mediatek.com>
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link:
https://lore.kernel.org/r/20220811025813.21492-18-tinghan.shen@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
arch/arm64/boot/dts/mediatek/mt8195.dtsi
patch
|
blob
|
history
diff --git
a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index f42d33414125fff89e6a600e390f6afdc26e82c3..9c14c42f07139bf965f88b93d7697061f438ed41 100644
(file)
--- a/
arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/
arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@
-680,6
+680,7
@@
"mediatek,mt6589-wdt";
mediatek,disable-extrst;
reg = <0 0x10007000 0 0x100>;
+ #reset-cells = <1>;
};
apmixedsys: syscon@1000c000 {
@@
-782,6
+783,8
@@
mediatek,topckgen = <&topckgen>;
power-domains = <&spm MT8195_POWER_DOMAIN_AUDIO>;
interrupts = <GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH 0>;
+ resets = <&watchdog 14>;
+ reset-names = "audiosys";
clocks = <&clk26m>,
<&apmixedsys CLK_APMIXED_APLL1>,
<&apmixedsys CLK_APMIXED_APLL2>,