dt-bindings: ti-serdes-mux: Add defines for J721S2 SoC

There are 4 lanes in the single instance of J721S2 SERDES. Each SERDES
lane mux can select upto 4 different IPs. Define all the possible
functions.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peter Rosin <peda@axentia.se>
Link: https://lore.kernel.org/r/0571fd6b-ec4d-71b3-5cf7-6fa48ed5592c@axentia.se
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h
index d417b9268b162dfc2dfccbc58ca6eb70f7897821..d3116c52ab720d7f7b45978d31ac01ec4795b939 100644 (file)
--- a/include/dt-bindings/mux/ti-serdes.h
+++ b/include/dt-bindings/mux/ti-serdes.h
@@ -95,4 +95,26 @@
 #define AM64_SERDES0_LANE0_PCIE0               0x0
 #define AM64_SERDES0_LANE0_USB                 0x1
 
+/* J721S2 */
+
+#define J721S2_SERDES0_LANE0_EDP_LANE0         0x0
+#define J721S2_SERDES0_LANE0_PCIE1_LANE0       0x1
+#define J721S2_SERDES0_LANE0_IP3_UNUSED                0x2
+#define J721S2_SERDES0_LANE0_IP4_UNUSED                0x3
+
+#define J721S2_SERDES0_LANE1_EDP_LANE1         0x0
+#define J721S2_SERDES0_LANE1_PCIE1_LANE1       0x1
+#define J721S2_SERDES0_LANE1_USB               0x2
+#define J721S2_SERDES0_LANE1_IP4_UNUSED                0x3
+
+#define J721S2_SERDES0_LANE2_EDP_LANE2         0x0
+#define J721S2_SERDES0_LANE2_PCIE1_LANE2       0x1
+#define J721S2_SERDES0_LANE2_IP3_UNUSED                0x2
+#define J721S2_SERDES0_LANE2_IP4_UNUSED                0x3
+
+#define J721S2_SERDES0_LANE3_EDP_LANE3         0x0
+#define J721S2_SERDES0_LANE3_PCIE1_LANE3       0x1
+#define J721S2_SERDES0_LANE3_USB               0x2
+#define J721S2_SERDES0_LANE3_IP4_UNUSED                0x3
+
 #endif /* _DT_BINDINGS_MUX_TI_SERDES */