mct: timer@101c0000 {
                        compatible = "samsung,exynos4210-mct";
                        reg = <0x101c0000 0xb00>;
-                       interrupt-parent = <&mct_map>;
-                       interrupts = <0>, <1>, <2>, <3>, <4>, <5>, <6>, <7>,
-                                       <8>, <9>, <10>, <11>;
-
-                       mct_map: mct-map {
-                               #interrupt-cells = <1>;
-                               #address-cells = <0>;
-                               #size-cells = <0>;
-                               interrupt-map = <0 &combiner 23 3>,
-                                               <1 &combiner 23 4>,
-                                               <2 &combiner 25 2>,
-                                               <3 &combiner 25 3>,
-                                               <4 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
-                                               <5 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>,
-                                               <6 &gic 0 122 IRQ_TYPE_LEVEL_HIGH>,
-                                               <7 &gic 0 123 IRQ_TYPE_LEVEL_HIGH>,
-                                               <8 &gic 0 128 IRQ_TYPE_LEVEL_HIGH>,
-                                               <9 &gic 0 129 IRQ_TYPE_LEVEL_HIGH>,
-                                               <10 &gic 0 130 IRQ_TYPE_LEVEL_HIGH>,
-                                               <11 &gic 0 131 IRQ_TYPE_LEVEL_HIGH>;
-                       };
+                       interrupts-extended = <&combiner 23 3>,
+                                             <&combiner 23 4>,
+                                             <&combiner 25 2>,
+                                             <&combiner 25 3>,
+                                             <&gic 0 120 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&gic 0 121 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&gic 0 122 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&gic 0 123 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&gic 0 128 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&gic 0 129 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&gic 0 130 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&gic 0 131 IRQ_TYPE_LEVEL_HIGH>;
                };
 
                watchdog: watchdog@101d0000 {