iommu/vt-d: Extend dmar_domain to support nested domain

The nested domain fields are exclusive to those that used for a DMA
remapping domain. Use union to avoid memory waste.

Link: https://lore.kernel.org/r/20231026044216.64964-3-yi.l.liu@intel.com
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Signed-off-by: Yi Liu <yi.l.liu@intel.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>

diff --git a/drivers/iommu/intel/iommu.h b/drivers/iommu/intel/iommu.h
index cc73015797737c877b308cc39e3ce65341cd25aa..244f111ea0bb60e60af6fa8d3d9bad0afa7367ef 100644 (file)
--- a/drivers/iommu/intel/iommu.h
+++ b/drivers/iommu/intel/iommu.h
@@ -25,6 +25,7 @@
 
 #include <asm/cacheflush.h>
 #include <asm/iommu.h>
+#include <uapi/linux/iommufd.h>
 
 /*
  * VT-d hardware uses 4KiB page size regardless of host page size.
@@ -605,15 +606,38 @@ struct dmar_domain {
        struct list_head devices;       /* all devices' list */
        struct list_head dev_pasids;    /* all attached pasids */
 
-       struct dma_pte  *pgd;           /* virtual address */
-       int             gaw;            /* max guest address width */
-
-       /* adjusted guest address width, 0 is level 2 30-bit */
-       int             agaw;
        int             iommu_superpage;/* Level of superpages supported:
                                           0 == 4KiB (no superpages), 1 == 2MiB,
                                           2 == 1GiB, 3 == 512GiB, 4 == 1TiB */
-       u64             max_addr;       /* maximum mapped address */
+       union {
+               /* DMA remapping domain */
+               struct {
+                       /* virtual address */
+                       struct dma_pte  *pgd;
+                       /* max guest address width */
+                       int             gaw;
+                       /*
+                        * adjusted guest address width:
+                        *   0: level 2 30-bit
+                        *   1: level 3 39-bit
+                        *   2: level 4 48-bit
+                        *   3: level 5 57-bit
+                        */
+                       int             agaw;
+                       /* maximum mapped address */
+                       u64             max_addr;
+               };
+
+               /* Nested user domain */
+               struct {
+                       /* parent page table which the user domain is nested on */
+                       struct dmar_domain *s2_domain;
+                       /* user page table pointer (in GPA) */
+                       unsigned long s1_pgtbl;
+                       /* page table attributes */
+                       struct iommu_hwpt_vtd_s1 s1_cfg;
+               };
+       };
 
        struct iommu_domain domain;     /* generic domain data structure for
                                           iommu core */