ARM: dts: rzg1: Add missing Ethernet PHY resets
authorGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 9 Sep 2021 09:03:11 +0000 (11:03 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 28 Sep 2021 07:45:22 +0000 (09:45 +0200)
Describe all Ethernet PHY reset GPIOs on RZ/G1 boards, to avoid relying
solely on boot loaders to bring PHYs out of reset.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/e20b3643b4dc5f6c2a9e19d9544495c06075d9ff.1631177442.git.geert+renesas@glider.be
arch/arm/boot/dts/r8a7743-sk-rzg1m.dts
arch/arm/boot/dts/r8a7745-sk-rzg1e.dts

index ce36cf404fa2b1c495dd4ff6c11b725c927ce5f2..ff274bfcb6646ea72dcb9f61edec3d1882de1a97 100644 (file)
@@ -7,6 +7,7 @@
 
 /dts-v1/;
 #include "r8a7743.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 
 / {
        model = "SK-RZG1M";
@@ -75,5 +76,6 @@
                interrupt-parent = <&irqc>;
                interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
                micrel,led-mode = <1>;
+               reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
        };
 };
index 4ab6d3fcc857f7db2f65e8cebfddce36d6999553..0a75e8c79acc0e58a7431411f5303b9bc75ab143 100644 (file)
@@ -7,6 +7,7 @@
 
 /dts-v1/;
 #include "r8a7745.dtsi"
+#include <dt-bindings/gpio/gpio.h>
 
 / {
        model = "SK-RZG1E";
@@ -70,5 +71,6 @@
                interrupt-parent = <&irqc>;
                interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
                micrel,led-mode = <1>;
+               reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
        };
 };