unsigned short max_segs;
 };
 
+struct tmio_mmc_dma {
+       enum dma_slave_buswidth dma_buswidth;
+       bool (*filter)(struct dma_chan *chan, void *arg);
+       void (*enable)(struct tmio_mmc_host *host, bool enable);
+};
+
+struct renesas_sdhi {
+       struct clk *clk;
+       struct clk *clk_cd;
+       struct tmio_mmc_data mmc_data;
+       struct tmio_mmc_dma dma_priv;
+       struct pinctrl *pinctrl;
+       struct pinctrl_state *pins_default, *pins_uhs;
+       void __iomem *scc_ctl;
+};
+
+#define host_to_priv(host) \
+       container_of((host)->pdata, struct renesas_sdhi, mmc_data)
+
 int renesas_sdhi_probe(struct platform_device *pdev,
                       const struct tmio_mmc_dma_ops *dma_ops);
 int renesas_sdhi_remove(struct platform_device *pdev);
 
 #define SDHI_VER_GEN3_SD       0xcc10
 #define SDHI_VER_GEN3_SDMMC    0xcd10
 
-#define host_to_priv(host) \
-       container_of((host)->pdata, struct renesas_sdhi, mmc_data)
-
-struct renesas_sdhi {
-       struct clk *clk;
-       struct clk *clk_cd;
-       struct tmio_mmc_data mmc_data;
-       struct tmio_mmc_dma dma_priv;
-       struct pinctrl *pinctrl;
-       struct pinctrl_state *pins_default, *pins_uhs;
-       void __iomem *scc_ctl;
-};
-
 static void renesas_sdhi_sdbuf_width(struct tmio_mmc_host *host, int width)
 {
        u32 val;
                host->bus_shift = of_data->bus_shift;
        }
 
-       host->dma               = dma_priv;
        host->write16_hook      = renesas_sdhi_write16_hook;
        host->clk_enable        = renesas_sdhi_clk_enable;
        host->clk_update        = renesas_sdhi_clk_update;
 
 static void
 renesas_sdhi_internal_dmac_enable_dma(struct tmio_mmc_host *host, bool enable)
 {
+       struct renesas_sdhi *priv = host_to_priv(host);
+
        if (!host->chan_tx || !host->chan_rx)
                return;
 
                renesas_sdhi_internal_dmac_dm_write(host, DM_CM_INFO1,
                                                    INFO1_CLEAR);
 
-       if (host->dma->enable)
-               host->dma->enable(host, enable);
+       if (priv->dma_priv.enable)
+               priv->dma_priv.enable(host, enable);
 }
 
 static void
 
 static void renesas_sdhi_sys_dmac_enable_dma(struct tmio_mmc_host *host,
                                             bool enable)
 {
+       struct renesas_sdhi *priv = host_to_priv(host);
+
        if (!host->chan_tx || !host->chan_rx)
                return;
 
-       if (host->dma->enable)
-               host->dma->enable(host, enable);
+       if (priv->dma_priv.enable)
+               priv->dma_priv.enable(host, enable);
 }
 
 static void renesas_sdhi_sys_dmac_abort_dma(struct tmio_mmc_host *host)
 static void renesas_sdhi_sys_dmac_request_dma(struct tmio_mmc_host *host,
                                              struct tmio_mmc_data *pdata)
 {
+       struct renesas_sdhi *priv = host_to_priv(host);
+
        /* We can only either use DMA for both Tx and Rx or not use it at all */
        if (!host->pdev->dev.of_node &&
            (!pdata->chan_priv_tx || !pdata->chan_priv_rx))
                dma_cap_set(DMA_SLAVE, mask);
 
                host->chan_tx = dma_request_slave_channel_compat(mask,
-                                       host->dma->filter, pdata->chan_priv_tx,
+                                       priv->dma_priv.filter, pdata->chan_priv_tx,
                                        &host->pdev->dev, "tx");
                dev_dbg(&host->pdev->dev, "%s: TX: got channel %p\n", __func__,
                        host->chan_tx);
                cfg.direction = DMA_MEM_TO_DEV;
                cfg.dst_addr = res->start +
                        (CTL_SD_DATA_PORT << host->bus_shift);
-               cfg.dst_addr_width = host->dma->dma_buswidth;
+               cfg.dst_addr_width = priv->dma_priv.dma_buswidth;
                if (!cfg.dst_addr_width)
                        cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
                cfg.src_addr = 0;
                        goto ecfgtx;
 
                host->chan_rx = dma_request_slave_channel_compat(mask,
-                                       host->dma->filter, pdata->chan_priv_rx,
+                                       priv->dma_priv.filter, pdata->chan_priv_rx,
                                        &host->pdev->dev, "rx");
                dev_dbg(&host->pdev->dev, "%s: RX: got channel %p\n", __func__,
                        host->chan_rx);
 
                cfg.direction = DMA_DEV_TO_MEM;
                cfg.src_addr = cfg.dst_addr + host->pdata->dma_rx_offset;
-               cfg.src_addr_width = host->dma->dma_buswidth;
+               cfg.src_addr_width = priv->dma_priv.dma_buswidth;
                if (!cfg.src_addr_width)
                        cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
                cfg.dst_addr = 0;
 
 struct tmio_mmc_data;
 struct tmio_mmc_host;
 
-struct tmio_mmc_dma {
-       enum dma_slave_buswidth dma_buswidth;
-       bool (*filter)(struct dma_chan *chan, void *arg);
-       void (*enable)(struct tmio_mmc_host *host, bool enable);
-};
-
 struct tmio_mmc_dma_ops {
        void (*start)(struct tmio_mmc_host *host, struct mmc_data *data);
        void (*enable)(struct tmio_mmc_host *host, bool enable);
 
        struct platform_device *pdev;
        struct tmio_mmc_data *pdata;
-       struct tmio_mmc_dma     *dma;
 
        /* DMA support */
        bool                    force_pio;