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drm/i915: Skip final clflush if LLC is coherent
author
Chris Wilson
<chris@chris-wilson.co.uk>
Fri, 18 Nov 2016 21:17:47 +0000
(21:17 +0000)
committer
Chris Wilson
<chris@chris-wilson.co.uk>
Fri, 18 Nov 2016 22:33:49 +0000
(22:33 +0000)
If the LLC is coherent with the object, we do not need to worry about
whether main memory and cache mismatch when we hand the object back to
the system.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link:
http://patchwork.freedesktop.org/patch/msgid/20161118211747.25197-2-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/i915_gem.c
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diff --git
a/drivers/gpu/drm/i915/i915_gem.c
b/drivers/gpu/drm/i915/i915_gem.c
index b6ad1bae5a158e6313797fdc4a227c594fc5affa..902fa427c19612bac15dd0540f4ebde846da7943 100644
(file)
--- a/
drivers/gpu/drm/i915/i915_gem.c
+++ b/
drivers/gpu/drm/i915/i915_gem.c
@@
-229,7
+229,8
@@
__i915_gem_object_release_shmem(struct drm_i915_gem_object *obj,
if (obj->mm.madv == I915_MADV_DONTNEED)
obj->mm.dirty = false;
- if ((obj->base.read_domains & I915_GEM_DOMAIN_CPU) == 0)
+ if ((obj->base.read_domains & I915_GEM_DOMAIN_CPU) == 0 &&
+ !cpu_cache_is_coherent(obj->base.dev, obj->cache_level))
drm_clflush_sg(pages);
obj->base.read_domains = I915_GEM_DOMAIN_CPU;