drm/i915/dg1: add initial DG-1 definitions
authorAbdiel Janulgue <abdiel.janulgue@linux.intel.com>
Mon, 13 Jul 2020 18:23:17 +0000 (11:23 -0700)
committerLucas De Marchi <lucas.demarchi@intel.com>
Tue, 14 Jul 2020 09:47:17 +0000 (02:47 -0700)
Bspec: 33617, 33617

v2: s/intel_dg1_info/dg1_info/ as done for other platforms before and
    try to shut up compiler about ununsed variable that we know
    shouldn't be used (Lucas)
v3: replace explicit attribute with __maybe_unused (Lucas)

Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Stuart Summers <stuart.summers@intel.com>
Cc: Vanshidhar Konda <vanshidhar.r.konda@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Aravind Iddamsetty <aravind.iddamsetty@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200713182321.12390-2-lucas.demarchi@intel.com
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_pci.c
drivers/gpu/drm/i915/intel_device_info.c
drivers/gpu/drm/i915/intel_device_info.h

index d357043db44e1a7304f5a6662caaa56b2d7b76db..7f668a49b03df50b195992592dfc13d82c6185e4 100644 (file)
@@ -1431,6 +1431,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define IS_ELKHARTLAKE(dev_priv)       IS_PLATFORM(dev_priv, INTEL_ELKHARTLAKE)
 #define IS_TIGERLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_TIGERLAKE)
 #define IS_ROCKETLAKE(dev_priv)        IS_PLATFORM(dev_priv, INTEL_ROCKETLAKE)
+#define IS_DG1(dev_priv)        IS_PLATFORM(dev_priv, INTEL_DG1)
 #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
                                    (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
 #define IS_BDW_ULT(dev_priv) \
@@ -1559,6 +1560,12 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define IS_RKL_REVID(p, since, until) \
        (IS_ROCKETLAKE(p) && IS_REVID(p, since, until))
 
+#define DG1_REVID_A0           0x0
+#define DG1_REVID_B0           0x1
+
+#define IS_DG1_REVID(p, since, until) \
+       (IS_DG1(p) && IS_REVID(p, since, until))
+
 #define IS_LP(dev_priv)        (INTEL_INFO(dev_priv)->is_lp)
 #define IS_GEN9_LP(dev_priv)   (IS_GEN(dev_priv, 9) && IS_LP(dev_priv))
 #define IS_GEN9_BC(dev_priv)   (IS_GEN(dev_priv, 9) && !IS_LP(dev_priv))
index db916fff3f0d1526153d8fc766dae1d36e9f0742..2338f92ce4900aa0cfcfee2c4643fe9b43fe6733 100644 (file)
@@ -897,8 +897,20 @@ static const struct intel_device_info rkl_info = {
 
 #define GEN12_DGFX_FEATURES \
        GEN12_FEATURES, \
+       .memory_regions = REGION_SMEM | REGION_LMEM, \
+       .has_master_unit_irq = 1, \
        .is_dgfx = 1
 
+static const struct intel_device_info dg1_info __maybe_unused = {
+       GEN12_DGFX_FEATURES,
+       PLATFORM(INTEL_DG1),
+       .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D),
+       .require_force_probe = 1,
+       .platform_engine_mask =
+               BIT(RCS0) | BIT(BCS0) | BIT(VECS0) |
+               BIT(VCS0) | BIT(VCS2),
+};
+
 #undef GEN
 #undef PLATFORM
 
index 3f5dc37d2b7c60ce339341b1a4a9e597de00d999..40c590db3c7616d91d50b9141f9919852cc075b3 100644 (file)
@@ -64,6 +64,7 @@ static const char * const platform_names[] = {
        PLATFORM_NAME(ELKHARTLAKE),
        PLATFORM_NAME(TIGERLAKE),
        PLATFORM_NAME(ROCKETLAKE),
+       PLATFORM_NAME(DG1),
 };
 #undef PLATFORM_NAME
 
index 71edb396b31a45cba2d6fe5734df4cb88db97047..fd2385457ab665f94ca188fa59ccf36de72cee1a 100644 (file)
@@ -82,6 +82,7 @@ enum intel_platform {
        /* gen12 */
        INTEL_TIGERLAKE,
        INTEL_ROCKETLAKE,
+       INTEL_DG1,
        INTEL_MAX_PLATFORMS
 };