drm/amd/display: Source minimum HBlank support
authorAshley Thomas <Ashley.Thomas2@amd.com>
Thu, 1 Oct 2020 07:16:05 +0000 (00:16 -0700)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 24 Nov 2020 17:07:13 +0000 (12:07 -0500)
[Why]
Some sink devices wish to have access to the minimum HBlank supported by
the ASIC.

[How]
Make the ASIC minimum HBlank available in Source Device information
address 0x340.

Signed-off-by: Ashley Thomas <Ashley.Thomas2@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c

index d15220a4eeb68108ac32825659cdefa3a3857f6e..be58134a795484acf9ae4d04684a03f6e6361559 100644 (file)
@@ -1761,6 +1761,7 @@ static bool dcn301_resource_construct(
        dc->caps.i2c_speed_in_khz = 100;
        dc->caps.i2c_speed_in_khz_hdcp = 5; /*1.4 w/a enabled by default*/
        dc->caps.max_cursor_size = 256;
+       dc->caps.min_horizontal_blanking_period = 80;
        dc->caps.dmdata_alloc_size = 2048;
        dc->caps.max_slave_planes = 1;
        dc->caps.is_apu = true;
index 376ccdb85e30c4cfd6dda84539627ac20dba50b4..808c4dcdb3ac830c8d9f596f1866438d6210f4fc 100644 (file)
@@ -1309,6 +1309,7 @@ static bool dcn302_resource_construct(
        dc->caps.i2c_speed_in_khz = 100;
        dc->caps.i2c_speed_in_khz_hdcp = 5; /*1.4 w/a applied by derfault*/
        dc->caps.max_cursor_size = 256;
+       dc->caps.min_horizontal_blanking_period = 80;
        dc->caps.dmdata_alloc_size = 2048;
 
        dc->caps.max_slave_planes = 1;