ARM: dts: qcom: sdx55: add IPA information
authorAlex Elder <elder@linaro.org>
Fri, 9 Apr 2021 15:52:51 +0000 (10:52 -0500)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Wed, 14 Apr 2021 02:35:56 +0000 (21:35 -0500)
Add IPA-related nodes and definitions to "sdx55.dtsi".  The SMP2P
nodes (ipa_smp2p_out and ipa_smp2p_in) are already present.

Signed-off-by: Alex Elder <elder@linaro.org>
Link: https://lore.kernel.org/r/20210409155251.955632-1-elder@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
arch/arm/boot/dts/qcom-sdx55.dtsi

index bed83d1ddc29727800b1e7d2b892a26f974dc857..0057c7c04d31a83312f011751bce51bfcf280c6c 100644 (file)
                        status = "disabled";
                };
 
+               ipa: ipa@1e40000 {
+                       compatible = "qcom,sdx55-ipa";
+
+                       iommus = <&apps_smmu 0x5e0 0x0>,
+                                <&apps_smmu 0x5e2 0x0>;
+                       reg = <0x1e40000 0x7000>,
+                             <0x1e50000 0x4b20>,
+                             <0x1e04000 0x2c000>;
+                       reg-names = "ipa-reg",
+                                   "ipa-shared",
+                                   "gsi";
+
+                       interrupts-extended = <&intc GIC_SPI 241 IRQ_TYPE_EDGE_RISING>,
+                                             <&intc GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+                                             <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>;
+                       interrupt-names = "ipa",
+                                         "gsi",
+                                         "ipa-clock-query",
+                                         "ipa-setup-ready";
+
+                       clocks = <&rpmhcc RPMH_IPA_CLK>;
+                       clock-names = "core";
+
+                       interconnects = <&system_noc MASTER_IPA &system_noc SLAVE_SNOC_MEM_NOC_GC>,
+                                       <&mem_noc MASTER_SNOC_GC_MEM_NOC &mc_virt SLAVE_EBI_CH0>,
+                                       <&system_noc MASTER_IPA &system_noc SLAVE_OCIMEM>,
+                                       <&mem_noc MASTER_AMPSS_M0 &system_noc SLAVE_IPA_CFG>;
+                       interconnect-names = "memory-a",
+                                            "memory-b",
+                                            "imem",
+                                            "config";
+
+                       qcom,smem-states = <&ipa_smp2p_out 0>,
+                                          <&ipa_smp2p_out 1>;
+                       qcom,smem-state-names = "ipa-clock-enabled-valid",
+                                               "ipa-clock-enabled";
+
+                       status = "disabled";
+               };
+
                tcsr_mutex: hwlock@1f40000 {
                        compatible = "qcom,tcsr-mutex";
                        reg = <0x01f40000 0x40000>;