spi: tegra20-slink: Add OPP support
authorDmitry Osipenko <digetx@gmail.com>
Tue, 30 Nov 2021 23:23:31 +0000 (02:23 +0300)
committerThierry Reding <treding@nvidia.com>
Thu, 16 Dec 2021 13:05:24 +0000 (14:05 +0100)
The SPI on Tegra belongs to the core power domain and we're going to
enable GENPD support for the core domain. Now SPI driver must use OPP
API for driving the controller's clock rate because OPP API takes care
of reconfiguring the domain's performance state in accordance to the
rate. Add OPP support to the driver.

Acked-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/spi/spi-tegra20-slink.c

index e8204e155484d3db9b226187336af13d8b360c33..2a03739a0c609d96d344538a9fd066454a2bdd32 100644 (file)
 #include <linux/kthread.h>
 #include <linux/module.h>
 #include <linux/platform_device.h>
+#include <linux/pm_opp.h>
 #include <linux/pm_runtime.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
 #include <linux/reset.h>
 #include <linux/spi/spi.h>
 
+#include <soc/tegra/common.h>
+
 #define SLINK_COMMAND                  0x000
 #define SLINK_BIT_LENGTH(x)            (((x) & 0x1f) << 0)
 #define SLINK_WORD_SIZE(x)             (((x) & 0x1f) << 5)
@@ -680,7 +683,7 @@ static int tegra_slink_start_transfer_one(struct spi_device *spi,
        bits_per_word = t->bits_per_word;
        speed = t->speed_hz;
        if (speed != tspi->cur_speed) {
-               clk_set_rate(tspi->clk, speed * 4);
+               dev_pm_opp_set_rate(tspi->dev, speed * 4);
                tspi->cur_speed = speed;
        }
 
@@ -1066,6 +1069,10 @@ static int tegra_slink_probe(struct platform_device *pdev)
                goto exit_free_master;
        }
 
+       ret = devm_tegra_core_dev_init_opp_table_common(&pdev->dev);
+       if (ret)
+               goto exit_free_master;
+
        tspi->max_buf_size = SLINK_FIFO_DEPTH << 2;
        tspi->dma_buf_size = DEFAULT_SPI_DMA_BUF_LEN;