arm64: dts: ti: k3-j721e-common-proc-board: add assigned clks for DSS

The DSS related clock muxes are set via assigned-clocks in a way which
provides us:

VP0 - DisplayPort SST
VP1 - DPI0
VP2 - DSI
VP3 - DPI1

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
index 98e5e17e3ff7ef13c97f2e254391668b5ce1f77b..6df823aaa37c6d55e5b5ac3c49568764a0614ef6 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
@@ -472,3 +472,23 @@
        phy-mode = "rgmii-rxid";
        phy-handle = <&phy0>;
 };
+
+&dss {
+       /*
+        * These clock assignments are chosen to enable the following outputs:
+        *
+        * VP0 - DisplayPort SST
+        * VP1 - DPI0
+        * VP2 - DSI
+        * VP3 - DPI1
+        */
+
+       assigned-clocks = <&k3_clks 152 1>,
+                         <&k3_clks 152 4>,
+                         <&k3_clks 152 9>,
+                         <&k3_clks 152 13>;
+       assigned-clock-parents = <&k3_clks 152 2>,      /* PLL16_HSDIV0 */
+                                <&k3_clks 152 6>,      /* PLL19_HSDIV0 */
+                                <&k3_clks 152 11>,     /* PLL18_HSDIV0 */
+                                <&k3_clks 152 18>;     /* PLL23_HSDIV0 */
+};