arm64: dts: qcom: ipq8074: Add QUP UART6 node

Add node to support the QUP UART6 controller inside of IPQ8074.
Used by some routers to communicate with a Bluetooth controller.

Signed-off-by: Paweł Owoc <frut3k7@gmail.com>
Link: https://lore.kernel.org/r/20240229205426.232205-1-frut3k7@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 87a192de7a68b912208b471f839b06323ec19ba8..50f725053b9653d10fbe25ba4ff5128e8b93e4cc 100644 (file)
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -323,6 +323,13 @@
                                bias-disable;
                        };
 
+                       serial_5_pins: serial5-state {
+                               pins = "gpio9", "gpio16";
+                               function = "blsp5_uart";
+                               drive-strength = <8>;
+                               bias-disable;
+                       };
+
                        i2c_0_pins: i2c-0-state {
                                pins = "gpio42", "gpio43";
                                function = "blsp1_i2c";
@@ -471,6 +478,18 @@
                        status = "disabled";
                };
 
+               blsp1_uart6: serial@78b4000 {
+                       compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
+                       reg = <0x078b4000 0x200>;
+                       interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&gcc GCC_BLSP1_UART6_APPS_CLK>,
+                                <&gcc GCC_BLSP1_AHB_CLK>;
+                       clock-names = "core", "iface";
+                       pinctrl-0 = <&serial_5_pins>;
+                       pinctrl-names = "default";
+                       status = "disabled";
+               };
+
                blsp1_spi1: spi@78b5000 {
                        compatible = "qcom,spi-qup-v2.2.1";
                        #address-cells = <1>;