drm/amd/display: Fix ASIC check in aux timeout workaround
authorTaimur Hassan <syed.hassan@amd.com>
Thu, 29 Jun 2023 19:04:09 +0000 (15:04 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 18 Jul 2023 15:16:17 +0000 (11:16 -0400)
[Why]
Aux write was meant to be ASIC specific, and is
causing compliance failures on newer parts.

[How]
Make workaround specific to single ASIC.

Reviewed-by: Michael Strauss <michael.strauss@amd.com>
Acked-by: Alan Liu <haoping.liu@amd.com>
Signed-off-by: Taimur Hassan <syed.hassan@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.c

index 0fa1228bc178a0b1d4c66e555c08ecc5f09b5d25..0f19c07011b560c775528acfa58583e60706386a 100644 (file)
@@ -427,7 +427,7 @@ bool try_to_configure_aux_timeout(struct ddc_service *ddc,
 
        if ((ddc->link->chip_caps & EXT_DISPLAY_PATH_CAPS__DP_FIXED_VS_EN) &&
                        !ddc->link->dc->debug.disable_fixed_vs_aux_timeout_wa &&
-                       ASICREV_IS_YELLOW_CARP(ddc->ctx->asic_id.hw_internal_rev)) {
+                       ddc->ctx->dce_version == DCN_VERSION_3_1) {
                /* Fixed VS workaround for AUX timeout */
                const uint32_t fixed_vs_address = 0xF004F;
                const uint8_t fixed_vs_data[4] = {0x1, 0x22, 0x63, 0xc};