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drm/i915/migrate: fix offset calculation
author
Matthew Auld
<matthew.auld@intel.com>
Mon, 6 Dec 2021 11:25:37 +0000
(11:25 +0000)
committer
Matthew Auld
<matthew.auld@intel.com>
Wed, 8 Dec 2021 10:25:25 +0000
(10:25 +0000)
Ensure we add the engine base only after we calculate the qword offset
into the PTE window.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Ramalingam C <ramalingam.c@intel.com>
Reviewed-by: Ramalingam C <ramalingam.c@intel.com>
Link:
https://patchwork.freedesktop.org/patch/msgid/20211206112539.3149779-2-matthew.auld@intel.com
drivers/gpu/drm/i915/gt/intel_migrate.c
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diff --git
a/drivers/gpu/drm/i915/gt/intel_migrate.c
b/drivers/gpu/drm/i915/gt/intel_migrate.c
index 0f94dedc15999119ee332fbfe51be517fe965f6e..64afb9a52013d742cfcd878fbbf9a73d41079cd6 100644
(file)
--- a/
drivers/gpu/drm/i915/gt/intel_migrate.c
+++ b/
drivers/gpu/drm/i915/gt/intel_migrate.c
@@
-279,10
+279,10
@@
static int emit_pte(struct i915_request *rq,
GEM_BUG_ON(GRAPHICS_VER(rq->engine->i915) < 8);
/* Compute the page directory offset for the target address range */
- offset += (u64)rq->engine->instance << 32;
offset >>= 12;
offset *= sizeof(u64);
offset += 2 * CHUNK_SZ;
+ offset += (u64)rq->engine->instance << 32;
cs = intel_ring_begin(rq, 6);
if (IS_ERR(cs))