net/mlx5e: Use mlx5e_rqt_get_rqtn to access RQT hardware id
authorMaxim Mikityanskiy <maximmi@nvidia.com>
Tue, 6 Apr 2021 06:40:07 +0000 (09:40 +0300)
committerSaeed Mahameed <saeedm@nvidia.com>
Mon, 26 Jul 2021 16:50:39 +0000 (09:50 -0700)
In order to abstract from implementation details of mlx5e_rqt, use the
mlx5e_rqt_get_rqtn getter instead of accessing the field directly.

Signed-off-by: Maxim Mikityanskiy <maximmi@nvidia.com>
Reviewed-by: Tariq Toukan <tariqt@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_rx.c
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c

index 15153317a0830972fd31cd780108a4bccd9103ea..44bc6efd62fdb22369e1abce2ee3fe393130b4a5 100644 (file)
@@ -635,7 +635,7 @@ int mlx5e_ktls_add_rx(struct net_device *netdev, struct sock *sk,
        priv_rx->sw_stats = &priv->tls->sw_stats;
        mlx5e_set_ktls_rx_priv_ctx(tls_ctx, priv_rx);
 
-       rqtn = priv->rx_res->channels[rxq].direct_rqt.rqtn;
+       rqtn = mlx5e_rqt_get_rqtn(&priv->rx_res->channels[rxq].direct_rqt);
 
        err = mlx5e_ktls_create_tir(mdev, &priv_rx->tirn, rqtn);
        if (err)
index 0e387799ee93f685dcb5a67cf8edd69d4409bd77..a70ada2e7208f44f6e63a437c88d6eedfe4af7e4 100644 (file)
@@ -3143,7 +3143,9 @@ static void mlx5e_build_indir_tir_ctx(struct mlx5e_priv *priv,
                                      enum mlx5e_traffic_types tt,
                                      u32 *tirc)
 {
-       mlx5e_build_indir_tir_ctx_common(priv, priv->rx_res->indir_rqt.rqtn, tirc);
+       u32 rqtn = mlx5e_rqt_get_rqtn(&priv->rx_res->indir_rqt);
+
+       mlx5e_build_indir_tir_ctx_common(priv, rqtn, tirc);
        mlx5e_build_indir_tir_ctx_hash(&priv->rx_res->rss_params,
                                       &tirc_default_config[tt], tirc, false);
 }
@@ -3158,7 +3160,9 @@ static void mlx5e_build_inner_indir_tir_ctx(struct mlx5e_priv *priv,
                                            enum mlx5e_traffic_types tt,
                                            u32 *tirc)
 {
-       mlx5e_build_indir_tir_ctx_common(priv, priv->rx_res->indir_rqt.rqtn, tirc);
+       u32 rqtn = mlx5e_rqt_get_rqtn(&priv->rx_res->indir_rqt);
+
+       mlx5e_build_indir_tir_ctx_common(priv, rqtn, tirc);
        mlx5e_build_indir_tir_ctx_hash(&priv->rx_res->rss_params,
                                       &tirc_default_config[tt], tirc, true);
 }
@@ -3237,7 +3241,7 @@ static int mlx5e_create_direct_tir(struct mlx5e_priv *priv, struct mlx5e_tir *ti
                return -ENOMEM;
 
        tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
-       mlx5e_build_direct_tir_ctx(priv, rqt->rqtn, tirc);
+       mlx5e_build_direct_tir_ctx(priv, mlx5e_rqt_get_rqtn(rqt), tirc);
        err = mlx5e_create_tir(priv->mdev, tir, in);
        if (unlikely(err))
                mlx5_core_warn(priv->mdev, "create tirs failed, %d\n", err);
index 4c00abc472be1b00c27d41cf436850f54c73d229..dd5546fb0f42fb917375cf2b3d984156c4d9b7b2 100644 (file)
@@ -528,7 +528,7 @@ static int mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin *hp)
 
                MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
                MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT);
-               MLX5_SET(tirc, tirc, indirect_table, hp->indir_rqt.rqtn);
+               MLX5_SET(tirc, tirc, indirect_table, mlx5e_rqt_get_rqtn(&hp->indir_rqt));
                mlx5e_build_indir_tir_ctx_hash(&priv->rx_res->rss_params, &ttconfig,
                                               tirc, false);