phy: qcom-qmp-combo: consolidate lane config
authorJohan Hovold <johan+linaro@kernel.org>
Tue, 20 Sep 2022 07:38:23 +0000 (09:38 +0200)
committerVinod Koul <vkoul@kernel.org>
Sat, 24 Sep 2022 05:29:57 +0000 (10:59 +0530)
For legacy reasons, there are two configuration parameters that appear
to describe the number of lanes a PHY has, even if "nlanes" was actually
used for a different purpose.

Replace them both with a new field simply named "lanes".

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20220920073826.20811-15-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/qualcomm/phy-qcom-qmp-combo.c

index 08e96e383a2982c3b99bf2262b53dba73b827ada..417e0fcf1a9f89ef06ea9cdd483103ac73d216c7 100644 (file)
@@ -816,8 +816,7 @@ struct qmp_phy;
 struct qmp_phy_cfg {
        /* phy-type - PCIE/UFS/USB */
        unsigned int type;
-       /* number of lanes provided by phy */
-       int nlanes;
+       int lanes;
 
        /* Init sequence for PHY blocks - serdes, tx, rx, pcs */
        const struct qmp_phy_init_tbl *serdes_tbl;
@@ -879,8 +878,6 @@ struct qmp_phy_cfg {
 
        /* true, if PHY has a separate DP_COM control block */
        bool has_phy_dp_com_ctrl;
-       /* true, if PHY has secondary tx/rx lanes to be configured */
-       bool is_dual_lane_phy;
 
        /* Offset from PCS to PCS_USB region */
        unsigned int pcs_usb_offset;
@@ -1029,7 +1026,7 @@ static const char * const sc7180_usb3phy_reset_l[] = {
 
 static const struct qmp_phy_cfg sc7180_usb3phy_cfg = {
        .type                   = PHY_TYPE_USB3,
-       .nlanes                 = 1,
+       .lanes                  = 2,
 
        .serdes_tbl             = qmp_v3_usb3_serdes_tbl,
        .serdes_tbl_num         = ARRAY_SIZE(qmp_v3_usb3_serdes_tbl),
@@ -1056,12 +1053,11 @@ static const struct qmp_phy_cfg sc7180_usb3phy_cfg = {
        .pwrdn_delay_max        = POWER_DOWN_DELAY_US_MAX,
 
        .has_phy_dp_com_ctrl    = true,
-       .is_dual_lane_phy       = true,
 };
 
 static const struct qmp_phy_cfg sc7180_dpphy_cfg = {
        .type                   = PHY_TYPE_DP,
-       .nlanes                 = 1,
+       .lanes                  = 2,
 
        .serdes_tbl             = qmp_v3_dp_serdes_tbl,
        .serdes_tbl_num         = ARRAY_SIZE(qmp_v3_dp_serdes_tbl),
@@ -1091,7 +1087,6 @@ static const struct qmp_phy_cfg sc7180_dpphy_cfg = {
        .regs                   = qmp_v3_usb3phy_regs_layout,
 
        .has_phy_dp_com_ctrl    = true,
-       .is_dual_lane_phy       = true,
 
        .dp_aux_init = qcom_qmp_v3_phy_dp_aux_init,
        .configure_dp_tx = qcom_qmp_v3_phy_configure_dp_tx,
@@ -1106,7 +1101,7 @@ static const struct qmp_phy_combo_cfg sc7180_usb3dpphy_cfg = {
 
 static const struct qmp_phy_cfg sdm845_usb3phy_cfg = {
        .type                   = PHY_TYPE_USB3,
-       .nlanes                 = 1,
+       .lanes                  = 2,
 
        .serdes_tbl             = qmp_v3_usb3_serdes_tbl,
        .serdes_tbl_num         = ARRAY_SIZE(qmp_v3_usb3_serdes_tbl),
@@ -1133,7 +1128,6 @@ static const struct qmp_phy_cfg sdm845_usb3phy_cfg = {
        .pwrdn_delay_max        = POWER_DOWN_DELAY_US_MAX,
 
        .has_phy_dp_com_ctrl    = true,
-       .is_dual_lane_phy       = true,
 };
 
 static const struct qmp_phy_combo_cfg sdm845_usb3dpphy_cfg = {
@@ -1143,7 +1137,7 @@ static const struct qmp_phy_combo_cfg sdm845_usb3dpphy_cfg = {
 
 static const struct qmp_phy_cfg sm8150_usb3phy_cfg = {
        .type                   = PHY_TYPE_USB3,
-       .nlanes                 = 1,
+       .lanes                  = 2,
 
        .serdes_tbl             = sm8150_usb3_serdes_tbl,
        .serdes_tbl_num         = ARRAY_SIZE(sm8150_usb3_serdes_tbl),
@@ -1174,12 +1168,11 @@ static const struct qmp_phy_cfg sm8150_usb3phy_cfg = {
        .pwrdn_delay_max        = POWER_DOWN_DELAY_US_MAX,
 
        .has_phy_dp_com_ctrl    = true,
-       .is_dual_lane_phy       = true,
 };
 
 static const struct qmp_phy_cfg sc8180x_dpphy_cfg = {
        .type                   = PHY_TYPE_DP,
-       .nlanes                 = 1,
+       .lanes                  = 2,
 
        .serdes_tbl             = qmp_v4_dp_serdes_tbl,
        .serdes_tbl_num         = ARRAY_SIZE(qmp_v4_dp_serdes_tbl),
@@ -1209,7 +1202,6 @@ static const struct qmp_phy_cfg sc8180x_dpphy_cfg = {
        .regs                   = qmp_v3_usb3phy_regs_layout,
 
        .has_phy_dp_com_ctrl    = true,
-       .is_dual_lane_phy       = true,
 
        .dp_aux_init = qcom_qmp_v4_phy_dp_aux_init,
        .configure_dp_tx = qcom_qmp_v4_phy_configure_dp_tx,
@@ -1224,7 +1216,7 @@ static const struct qmp_phy_combo_cfg sc8180x_usb3dpphy_cfg = {
 
 static const struct qmp_phy_cfg sc8280xp_usb43dp_usb_cfg = {
        .type                   = PHY_TYPE_USB3,
-       .nlanes                 = 1,
+       .lanes                  = 2,
 
        .serdes_tbl             = sc8280xp_usb43dp_serdes_tbl,
        .serdes_tbl_num         = ARRAY_SIZE(sc8280xp_usb43dp_serdes_tbl),
@@ -1252,12 +1244,11 @@ static const struct qmp_phy_cfg sc8280xp_usb43dp_usb_cfg = {
        .pwrdn_delay_max        = POWER_DOWN_DELAY_US_MAX,
 
        .has_phy_dp_com_ctrl    = true,
-       .is_dual_lane_phy       = true,
 };
 
 static const struct qmp_phy_cfg sc8280xp_usb43dp_dp_cfg = {
        .type                   = PHY_TYPE_DP,
-       .nlanes                 = 1,
+       .lanes                  = 2,
 
        .serdes_tbl             = qmp_v5_dp_serdes_tbl,
        .serdes_tbl_num         = ARRAY_SIZE(qmp_v5_dp_serdes_tbl),
@@ -1287,7 +1278,6 @@ static const struct qmp_phy_cfg sc8280xp_usb43dp_dp_cfg = {
        .regs                   = qmp_v4_usb3phy_regs_layout,
 
        .has_phy_dp_com_ctrl    = true,
-       .is_dual_lane_phy       = true,
 
        .dp_aux_init = qcom_qmp_v4_phy_dp_aux_init,
        .configure_dp_tx = qcom_qmp_v4_phy_configure_dp_tx,
@@ -1302,7 +1292,7 @@ static const struct qmp_phy_combo_cfg sc8280xp_usb43dpphy_combo_cfg = {
 
 static const struct qmp_phy_cfg sm8250_usb3phy_cfg = {
        .type                   = PHY_TYPE_USB3,
-       .nlanes                 = 1,
+       .lanes                  = 2,
 
        .serdes_tbl             = sm8150_usb3_serdes_tbl,
        .serdes_tbl_num         = ARRAY_SIZE(sm8150_usb3_serdes_tbl),
@@ -1332,12 +1322,11 @@ static const struct qmp_phy_cfg sm8250_usb3phy_cfg = {
        .pwrdn_delay_max        = POWER_DOWN_DELAY_US_MAX,
 
        .has_phy_dp_com_ctrl    = true,
-       .is_dual_lane_phy       = true,
 };
 
 static const struct qmp_phy_cfg sm8250_dpphy_cfg = {
        .type                   = PHY_TYPE_DP,
-       .nlanes                 = 1,
+       .lanes                  = 2,
 
        .serdes_tbl             = qmp_v4_dp_serdes_tbl,
        .serdes_tbl_num         = ARRAY_SIZE(qmp_v4_dp_serdes_tbl),
@@ -1367,7 +1356,6 @@ static const struct qmp_phy_cfg sm8250_dpphy_cfg = {
        .regs                   = qmp_v4_usb3phy_regs_layout,
 
        .has_phy_dp_com_ctrl    = true,
-       .is_dual_lane_phy       = true,
 
        .dp_aux_init = qcom_qmp_v4_phy_dp_aux_init,
        .configure_dp_tx = qcom_qmp_v4_phy_configure_dp_tx,
@@ -2117,7 +2105,7 @@ static int qmp_combo_power_on(struct phy *phy)
        /* Tx, Rx, and PCS configurations */
        qmp_combo_configure_lane(tx, cfg->regs, cfg->tx_tbl, cfg->tx_tbl_num, 1);
 
-       if (cfg->is_dual_lane_phy) {
+       if (cfg->lanes >= 2) {
                qmp_combo_configure_lane(qphy->tx2, cfg->regs, cfg->tx_tbl,
                                         cfg->tx_tbl_num, 2);
        }
@@ -2128,7 +2116,7 @@ static int qmp_combo_power_on(struct phy *phy)
 
        qmp_combo_configure_lane(rx, cfg->regs, cfg->rx_tbl, cfg->rx_tbl_num, 1);
 
-       if (cfg->is_dual_lane_phy) {
+       if (cfg->lanes >= 2) {
                qmp_combo_configure_lane(qphy->rx2, cfg->regs, cfg->rx_tbl,
                                         cfg->rx_tbl_num, 2);
        }
@@ -2725,7 +2713,7 @@ static int qmp_combo_create(struct device *dev, struct device_node *np, int id,
        if (cfg->pcs_usb_offset)
                qphy->pcs_usb = qphy->pcs + cfg->pcs_usb_offset;
 
-       if (cfg->is_dual_lane_phy) {
+       if (cfg->lanes >= 2) {
                qphy->tx2 = devm_of_iomap(dev, np, 3, NULL);
                if (IS_ERR(qphy->tx2))
                        return PTR_ERR(qphy->tx2);