drm/xe: Remove dependency on intel_lrc_reg.h
authorLucas De Marchi <lucas.demarchi@intel.com>
Sat, 25 Feb 2023 00:15:41 +0000 (16:15 -0800)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Tue, 19 Dec 2023 23:29:21 +0000 (18:29 -0500)
Create regs/xe_lrc_layout.h file with all the offsets used by the xe
driver. Eventually the xe driver may use a different way to define them
since it doesn't supported below gen12.

v2: Rename file to intel_lrc_layout.h since it's not really about
    registers (Matt Roper)

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drivers/gpu/drm/xe/regs/xe_lrc_layout.h [new file with mode: 0644]
drivers/gpu/drm/xe/xe_execlist.c
drivers/gpu/drm/xe/xe_guc_submit.c
drivers/gpu/drm/xe/xe_lrc.c
drivers/gpu/drm/xe/xe_ring_ops.c

diff --git a/drivers/gpu/drm/xe/regs/xe_lrc_layout.h b/drivers/gpu/drm/xe/regs/xe_lrc_layout.h
new file mode 100644 (file)
index 0000000..4be81ab
--- /dev/null
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#ifndef _XE_LRC_LAYOUT_H_
+#define _XE_LRC_LAYOUT_H_
+
+#define CTX_CONTEXT_CONTROL            (0x02 + 1)
+#define CTX_RING_HEAD                  (0x04 + 1)
+#define CTX_RING_TAIL                  (0x06 + 1)
+#define CTX_RING_START                 (0x08 + 1)
+#define CTX_RING_CTL                   (0x0a + 1)
+#define CTX_PDP0_UDW                   (0x30 + 1)
+#define CTX_PDP0_LDW                   (0x32 + 1)
+
+#endif
index fe20c61281347dee71aba4966b6b6b632e89fee2..d788a6e894a6e977c5ee7ca429511738952f920f 100644 (file)
@@ -9,6 +9,7 @@
 
 #include "regs/xe_engine_regs.h"
 #include "regs/xe_gt_regs.h"
+#include "regs/xe_lrc_layout.h"
 #include "xe_bo.h"
 #include "xe_device.h"
 #include "xe_engine.h"
@@ -22,7 +23,6 @@
 #include "xe_sched_job.h"
 
 #include "gt/intel_gpu_commands.h"
-#include "gt/intel_lrc_reg.h"
 #include "i915_reg.h"
 
 #define XE_EXECLIST_HANG_LIMIT 1
index 6469d3cd3beb9d716e686383024a7ce88f402eb4..aa21f2bb5cbaaafa3580a6accf99a6ff9c787c7b 100644 (file)
@@ -13,6 +13,7 @@
 
 #include <drm/drm_managed.h>
 
+#include "regs/xe_lrc_layout.h"
 #include "xe_device.h"
 #include "xe_engine.h"
 #include "xe_force_wake.h"
@@ -32,8 +33,6 @@
 #include "xe_trace.h"
 #include "xe_vm.h"
 
-#include "gt/intel_lrc_reg.h"
-
 static struct xe_gt *
 guc_to_gt(struct xe_guc *guc)
 {
index bf12f71fbe729d388387d06a8e6f1d85bbd161c3..5baa3cf53852288ab2274f61d0cf062fc9a91c1c 100644 (file)
@@ -7,6 +7,7 @@
 
 #include "regs/xe_engine_regs.h"
 #include "regs/xe_gt_regs.h"
+#include "regs/xe_lrc_layout.h"
 #include "xe_bo.h"
 #include "xe_device.h"
 #include "xe_engine_types.h"
@@ -16,7 +17,6 @@
 #include "xe_vm.h"
 
 #include "gt/intel_gpu_commands.h"
-#include "gt/intel_lrc_reg.h"
 #include "i915_reg.h"
 
 #define GEN8_CTX_VALID                         (1 << 0)
index 1b633222fda6145c512dee6c1640ad1249c95e9f..6275f8c348782e533367883d8b402aa17cadac05 100644 (file)
@@ -6,6 +6,7 @@
 #include "xe_ring_ops.h"
 
 #include "regs/xe_gt_regs.h"
+#include "regs/xe_lrc_layout.h"
 #include "xe_engine_types.h"
 #include "xe_gt.h"
 #include "xe_lrc.h"
@@ -14,7 +15,6 @@
 #include "xe_vm_types.h"
 
 #include "gt/intel_gpu_commands.h"
-#include "gt/intel_lrc_reg.h"
 #include "i915_reg.h"
 
 static u32 preparser_disable(bool state)