--- /dev/null
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#ifndef _XE_LRC_LAYOUT_H_
+#define _XE_LRC_LAYOUT_H_
+
+#define CTX_CONTEXT_CONTROL (0x02 + 1)
+#define CTX_RING_HEAD (0x04 + 1)
+#define CTX_RING_TAIL (0x06 + 1)
+#define CTX_RING_START (0x08 + 1)
+#define CTX_RING_CTL (0x0a + 1)
+#define CTX_PDP0_UDW (0x30 + 1)
+#define CTX_PDP0_LDW (0x32 + 1)
+
+#endif
#include "regs/xe_engine_regs.h"
#include "regs/xe_gt_regs.h"
+#include "regs/xe_lrc_layout.h"
#include "xe_bo.h"
#include "xe_device.h"
#include "xe_engine.h"
#include "xe_sched_job.h"
#include "gt/intel_gpu_commands.h"
-#include "gt/intel_lrc_reg.h"
#include "i915_reg.h"
#define XE_EXECLIST_HANG_LIMIT 1
#include <drm/drm_managed.h>
+#include "regs/xe_lrc_layout.h"
#include "xe_device.h"
#include "xe_engine.h"
#include "xe_force_wake.h"
#include "xe_trace.h"
#include "xe_vm.h"
-#include "gt/intel_lrc_reg.h"
-
static struct xe_gt *
guc_to_gt(struct xe_guc *guc)
{
#include "regs/xe_engine_regs.h"
#include "regs/xe_gt_regs.h"
+#include "regs/xe_lrc_layout.h"
#include "xe_bo.h"
#include "xe_device.h"
#include "xe_engine_types.h"
#include "xe_vm.h"
#include "gt/intel_gpu_commands.h"
-#include "gt/intel_lrc_reg.h"
#include "i915_reg.h"
#define GEN8_CTX_VALID (1 << 0)
#include "xe_ring_ops.h"
#include "regs/xe_gt_regs.h"
+#include "regs/xe_lrc_layout.h"
#include "xe_engine_types.h"
#include "xe_gt.h"
#include "xe_lrc.h"
#include "xe_vm_types.h"
#include "gt/intel_gpu_commands.h"
-#include "gt/intel_lrc_reg.h"
#include "i915_reg.h"
static u32 preparser_disable(bool state)