arm64: dts: allwinner: h616: enable DVFS for all boards
authorAndre Przywara <andre.przywara@arm.com>
Thu, 18 Apr 2024 15:44:08 +0000 (16:44 +0100)
committerViresh Kumar <viresh.kumar@linaro.org>
Fri, 19 Apr 2024 07:04:28 +0000 (12:34 +0530)
With the DT bindings now describing the format of the CPU OPP tables, we
can include the OPP table in each board's .dts file, and specify the CPU
power supply.
This allows to enable DVFS, and get up to 50% of performance benefit in
the highest OPP, or up to 60% power savings in the lowest OPP, compared
to the fixed 1GHz @ 1.0V OPP we are running in by default at the moment.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi
arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts
arch/arm64/boot/dts/allwinner/sun50i-h618-longan-module-3h.dtsi
arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts
arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts
arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts

index af421ba24ce0c6daae4c015ab219e3c80fbc6fa0..d12b01c5f41b69029de04bc006be35c1ded3aeaa 100644 (file)
@@ -6,6 +6,7 @@
 /dts-v1/;
 
 #include "sun50i-h616.dtsi"
+#include "sun50i-h616-cpu-opp.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
        };
 };
 
+&cpu0 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
 &mmc0 {
        vmmc-supply = <&reg_dldo1>;
        /* Card detection pin is not connected */
index b5d713926a341a291d1eb4e649b7984cd8ebc9e4..a360d8567f95589832f4a402a88c1aae11ade033 100644 (file)
@@ -6,12 +6,17 @@
 /dts-v1/;
 
 #include "sun50i-h616-orangepi-zero.dtsi"
+#include "sun50i-h616-cpu-opp.dtsi"
 
 / {
        model = "OrangePi Zero2";
        compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616";
 };
 
+&cpu0 {
+       cpu-supply = <&reg_dcdca>;
+};
+
 &emac0 {
        allwinner,rx-delay-ps = <3100>;
        allwinner,tx-delay-ps = <700>;
index 959b6fd18483b48eefc23b6eb634604d2a7a52e5..26d25b5b59e0f89360799404d9998ca612887aa7 100644 (file)
@@ -6,6 +6,7 @@
 /dts-v1/;
 
 #include "sun50i-h616.dtsi"
+#include "sun50i-h616-cpu-opp.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
        };
 };
 
+&cpu0 {
+       cpu-supply = <&reg_dcdca>;
+};
+
 &ehci0 {
        status = "okay";
 };
index 8c1263a3939e768e6204674d04fbf1e199ba1c80..e92d150aaf1c154dd6f5d8e973a9f18762a71e38 100644 (file)
@@ -4,6 +4,11 @@
  */
 
 #include "sun50i-h616.dtsi"
+#include "sun50i-h616-cpu-opp.dtsi"
+
+&cpu0 {
+       cpu-supply = <&reg_dcdc2>;
+};
 
 &mmc2 {
        pinctrl-names = "default";
index 21ca1977055d95cccc085779ba08e582f3c90697..6a4f0da9723303968c64710e5a700d6d681e9ea3 100644 (file)
@@ -6,6 +6,7 @@
 /dts-v1/;
 
 #include "sun50i-h616.dtsi"
+#include "sun50i-h616-cpu-opp.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
        };
 };
 
+&cpu0 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
 &ehci1 {
        status = "okay";
 };
index b3b1b8692125f9f75df58a4a464fb5a4f185d79c..e1cd7572a14cebf22fd53689f99035f9e0cbcd91 100644 (file)
@@ -6,12 +6,17 @@
 /dts-v1/;
 
 #include "sun50i-h616-orangepi-zero.dtsi"
+#include "sun50i-h616-cpu-opp.dtsi"
 
 / {
        model = "OrangePi Zero3";
        compatible = "xunlong,orangepi-zero3", "allwinner,sun50i-h618";
 };
 
+&cpu0 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
 &emac0 {
        allwinner,tx-delay-ps = <700>;
        phy-mode = "rgmii-rxid";
index ac0a2b7ea6f31089fba1bae1d76fbffba859320f..a6458b7a867130491a0a2bbfa9ba5a9a454fc953 100644 (file)
@@ -6,6 +6,7 @@
 /dts-v1/;
 
 #include "sun50i-h616.dtsi"
+#include "sun50i-h616-cpu-opp.dtsi"
 
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
        };
 };
 
+&cpu0 {
+       cpu-supply = <&reg_dcdc2>;
+};
+
 &ehci0 {
        status = "okay";
 };