mips: dts: ralink: mt7621: reorder cpuintc node attributes

Reorder the CPU Interrupt Controller node's attributes to follow
what the DTS Coding Style dictates.

Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
Reviewed-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index 73dad64e11fee2929d1ee706807d837cd5b571b7..ec87e46ba6de6ecb26c82c3c4a0039cd53c6e9df 100644 (file)
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -27,10 +27,12 @@
        };
 
        cpuintc: cpuintc {
+               compatible = "mti,cpu-interrupt-controller";
+
                #address-cells = <0>;
                #interrupt-cells = <1>;
+
                interrupt-controller;
-               compatible = "mti,cpu-interrupt-controller";
        };
 
        mmc_fixed_3v3: regulator-3v3 {